ALUMINUM ELECTROLYTIC CAPACITORS
UWD
Chip Type, Low Impedance
High Temperature (260°C) Reflow
Corresponding with 260
°C peak reflow soldering
Recomended reflow condition : 260°C peak 5 sec. 230°C over 60 sec.
2 times (
φ
10
×
10 : 1 time)
Chip type, low impedance temperature range up to +105
°C
.
Designed for surface mounting on high density PC board.
Applicable to automatic mounting machine fed with carrier tape.
Compliant to the RoHS directive (2011/65/EU).
UWD
High
Temperature
Reflow
UUD
Specifications
Item
Category Temperature Range
Rated Voltage Range
Rated Capacitance Range
Capacitance Tolerance
Leakage Current
Tangent of loss angle (tan
δ)
Performance Characteristics
–55 to +105°C
6.3 to 50V
1 to 1500µF
± 20% at 120Hz, 20°C
After 2 minutes' application of rated voltage at 20°C, leakage current is not more than 0.01 CV or 3 (µA), whichever is greater.
Measurement frequency : 120Hz at 20°C
Rated voltage (V)
6.3
10
16
25
35
50
tan
δ
(MAX.)
0.26 (0.28) 0.20 (0.24) 0.16 (0.20) 0.14 (0.16) 0.12 (0.14) 0.12 (0.14)
Measurement frequency : 120Hz
Rated voltage (V)
Z– 25°C / Z+20°C
Impedance ratio
(
) is
φ8
over
Stability at Low Temperature
ZT / Z20 (MAX.)
Z– 55°C / Z+20°C
6.3
3
5
10
2
4
16
2
4
25
2
3
35
2
3
50
2
3
Endurance
The specifications listed at right shall be met
when the capacitors are restored to 20°C after the
rated voltage is applied for 5000 hours (2000
hours for
φ
D = 4, 5 and 6.3) at 105°C.
Capacitance change
tan
δ
Leakage current
Within ±30% of the initial capacitance value
200% or less than the initial specified value
Less than or equal to the initial specified value
Shelf Life
Resistance to soldering
heat
Marking
After storing the capacitors under no load at 105°C for 1000 hours and then performing voltage treatment based on JIS C 5101-4
clause 4.1 at 20°C, they shall meet the specified values for the endurance characteristics listed above.
The capacitors are kept on a hot plate for 30 seconds, which is
Capacitance change
Within ±10% of the initial capacitance value
maintained at 250°C. The capacitors shall meet the characteristic
tan
δ
Less than or equal to the initial specified value
requirements listed at right when they are removed from the plate
Leakage current
Less than or equal to the initial specified value
and restored to 20°C.
Black print on the case top.
Chip Type
(φ4 to
φ6.3)
Voltage (C:16V)
Series
Positive
0.3 MAX.
C±0.2
0.5 MAX.
Plastic platform
Type numbering system (Example : 16V 22
µ
F)
1
2
3
4
5
6
7
8
9
10 11 12 13 14
UWD 1 C 2 2 0 M C L 1 G S
A±0.2 E A±0.2
Package code
φD±0.5
A2
33C
WD
B±0.2
Configuration
Capacitance tolerance (±20%)
Rated capacitance (22µF)
Rated voltage (16V)
Series name
Type
Lot No.
Capacitance
L±0.3
H
Negative
(φ8,φ10)
Voltage (V:35V)
Trade mark
0.5 MAX.
Plastic platform
Series
0.3 MAX.
C±0.2
Positive
(mm)
φ
D×L
4 × 5.8
1.8
4.3
4.3
1.0
5.8
0.5 to 0.8
5 × 5.8
2.1
5.3
5.3
1.3
5.8
0.5 to 0.8
6.3 × 5.8
2.4
6.6
6.6
2.2
5.8
0.5 to 0.8
6.3 × 7.7
2.4
6.6
6.6
2.2
7.7
0.5 to 0.8
8 × 10
2.9
8.3
8.3
3.1
10
0.8 to 1.1
10 × 10
3.2
10.3
10.3
4.5
10
0.8 to 1.1
Lot No.
Capacitance
L±0.5
H
Negative
A
B
C
E
L
H
Voltage
V
6.3
j
Code
10
A
16
C
25
E
35
V
50
H
Dimension table in next page.
A±0.2 E A±0.2
A2
100V
WD
φD±0.5
B±0.2
141
ALUMINUM ELECTROLYTIC CAPACITORS
UWD
Dimensions
Cap.
(µF)
V
Code
6.3
0J
10
1A
16
1C
25
1E
35
1V
4
×
5.8
4
×
5.8
4
×
5.8
4
×
5.8
1.80
0.76
0.76
0.76
0.44
0.44
0.44
0.34
0.34
0.17
0.17
0.09
0.09
80
150
150
150
230
230
230
280
280
450
450
670
670
50
1H
5.00
5.00
5.00
1.52
0.88
0.88
0.88
0.68
0.68
0.68
0.34
0.34
0.34
0.18
0.18
30
30
30
85
165
165
165
185
185
185
300
300
300
670
670
1
2.2
3.3
4.7
10
15
22
27
33
47
56
68
100
150
220
330
470
680
1000
1500
010
2R2
3R3
4R7
100
150
220
270
330
470
560
680
101
151
221
331
471
681
102
152
4
×
5.8
5
×
5.8
5
×
5.8
5
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
7.7
8
×
10
8
×
10
10
×
10
10
×
10
1.80
0.76
0.76
0.76
0.44
0.44
0.44
0.44
0.34
0.17
0.17
0.09
0.09
80
150
150
150
230
230
230
230
280
450
450
670
670
4
×
5.8
1.80
0.76
0.76
0.44
0.44
0.44
0.44
0.44
0.34
0.34
0.17
0.17
0.09
80
150
150
230
230
230
230
230
280
280
450
450
670
4
×
5.8
5
×
5.8
5
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
7.7
8
×
10
8
×
10
10
×
10
10
×
10
1.80
0.76
0.76
0.44
0.44
0.44
0.44
0.44
0.34
0.17
0.17
0.09
0.09
80
150
150
230
230
230
230
230
280
450
450
670
670
5
×
5.8
5
×
5.8
5
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
7.7
6.3
×
7.7
8
×
10
8
×
10
10
×
10
10
×
10
5
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
7.7
6.3
×
7.7
6.3
×
7.7
8
×
10
8
×
10
8
×
10
10
×
10
10
×
10
4
×
5.8
5
×
5.8
5
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
7.7
8
×
10
8
×
10
10
×
10
10
×
10
1.80
0.76
0.76
0.44
0.44
0.44
0.44
0.44
0.34
0.17
0.17
0.09
0.09
80
150
150
230
230
230
230
230
280
450
450
670
670
5
×
5.8
5
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
5.8
6.3
×
7.7
6.3
×
7.7
8
×
10
8
×
10
10
×
10
Case size
φ
D
×
L (mm)
Impedance
Rated
ripple
Max. Impedance (
Ω
) at 20°C 100kHz,
Rated ripple current (mArms) at 105°C 100kHz
Frequency coefficient of rated ripple current
Frequency
Coefficient
50 Hz
0.35
120 Hz
0.50
300 Hz
0.64
1 kHz
0.83
10 kHz or more
1.00
Taping specifications are given in page 23.
Recommended land size, soldering by reflow are given
in page 18, 19.
Please refer to page 3 for the minimum order quantity.
142
FPGA/CPLD
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