NMF3000, NMF3010
Dual−Stage, Differential
Lines Filter with ESD
Protection
The NMF3000 and the NMF3010 are a dual−stage, differential line
ESD and filtering protection scheme for input signals into portable
devices. The NMF3000 is the first stage and is located at or very near
to the interface to the outside world. It provides the high−level ESD
protection as well as the initial filtering of incoming audio signals. The
NMF3010 is the second stage and provides additional signal filtering.
This second stage can be placed some distance away from the first
stage to allow for effective filtering across extended distances.
A1
http://onsemi.com
MARKING
DIAGRAMS
A1
Features
•
Dual Filtering Lines for 2−Channels or Differential Transmission
•
Separate Power and Analog Grounds for ESD Protection and
•
•
•
•
Filtering Circuitry
V
CC
Input Pin on First Stage to Set Microphone DC Bias
IEC 61000−4−2 Grade
±15
kV Contact ESD Protection on the Inputs,
V
CC
, and Between Power and Analog Grounds
IEC 61000−4−2 Level 1 ESD protection on All Other Pin−to−Pin
Combinations
These are Pb−Free Devices*
9 Bump Flip−Chip
CASE 499AE
A1
6 Bump Flip−Chip
CASE 499AF
A
L
Y
W
A1
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
V
CC
NMF3000FCT1G
NMF3010FCT1G
Microphone
Incoming
Audio
Signals
C
1st
Stage
C
2nd
Stage
Audio
Amplifier
Figure 1. System Diagram
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2004
1
March, 2004 − Rev. 1
Publication Order Number:
NMF3000/D
ÈÈ
ÈÈ
Ç
Ç
NMF
3000
ALYW
NIO
ALYW
NMF3000, NMF3010
FUNCTIONAL BLOCK DIAGRAMS
V
CC
+15
kV
Contact ESD
Protection
PGND
LOW PASS FILTERING
IN
OUT
+15
kV
Contact ESD
Protection
IEC Level 1
Contact ESD
Protection
PGND
+15
kV
Contact ESD
Protection
AGND
PGND
Figure 2. First Stage: NMF3000FCT1G
LOW PASS FILTERING
IN
OUT
+15
kV
Contact ESD
Protection
IEC Level 1
Contact ESD
Protection
PGND
+15
kV
Contact ESD
Protection
AGND
PGND
Figure 3. Second Stage: NMF3010FCT1G
http://onsemi.com
2
NMF3000, NMF3010
PINOUTS AND PIN DESCRIPTIONS
A1 Markers
1
2
3
A
OP
Vcc
IP
IP
Vcc
OP
B
PGND
PGND
PGND
PGND
PGND
PGND
C
ON
AGND
IN
IN
AGND
ON
Top View
Bumps Down
Bottom View
Bumps Up
Figure 4. Pinout Diagrams for First Stage: NMF3000FCT1G
PINOUT FUNCTIONS FOR FIRST STAGE
Pin
A1
A2
A3
B1, B2, B3
C1
C2
C3
Type
Output P
VCC
Input P
PGND
Output N
AGND
Input N
Positive Side Signal Output
DC Power Connection
Positive Side Signal Input
Power Ground
Negative Side Signal Output
Analog Ground
Negative Side Signal Input
Description
http://onsemi.com
3
NMF3000, NMF3010
PINOUTS AND PIN DESCRIPTIONS
A1 Markers
1
2
3
A
OP
PGND
IP
IP
PGND
OP
B
ON
AGND
IN
IN
AGND
ON
Top View
Bumps Down
Bottom View
Bumps Up
Figure 5. Pinout Diagrams for Second Stage: NMF3010FCT1G
PINOUT FUNCTIONS FOR SECOND STAGE
Pin
A1
A2
A3
B1
B2
B3
Type
Output P
PGND
Input P
Output N
AGND
Input N
Positive Side Signal Output
Power Ground
Positive Side Signal Input
Negative Side Signal Output
Analog Ground
Negative Side Signal Input
Description
http://onsemi.com
4
NMF3000, NMF3010
MAXIMUM RATINGS
Rating
Operating Ambient Temperature Range
Moisture Sensitivity
Storage Temperature Range
Supply Voltage
Symbol
T
A
MSL
T
stg
V
CC
Value
−40 to 85
Level 1
−55 to 150
0 to 11
°C
V
Units
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS
(V
CC
= 0 V to 10 V, T
A
= −40°C to 85°C, All Typical Values Measured at 25°C)
Parameter
Supply Voltage
Attenuation
Attenuation
B2B Diode Breakdown Voltage
Standoff Voltage
Leakage Current
Power Dissipation
NMF3000FCT1G DC Series
Resistance
NMF3010FCT1G DC Series
Resistance
Input Capacitance per Line
Bias Resistance per Line
Crosstalk
Noise
Distortion
Input to output on first stage
Input to output on second stage
f = 1.0 MHz, for each stage when capacitor
has 2.0 V across its terminals.
First Stage Only
50
W
Source and Load
Idle−channel or Self−noise of the Network
Anywhere in the Bandwidth 20 Hz to 20 kHz
RI/O
RI/O
C
LINE
R
BIAS1
CT
997
950
900
950
−25
6.0
0.01
1050
1000
1000
1000
V = VRM, for each stage
First stage only
@ 800 MHz, 50
W
Environment
@ 1.9 GHz, 50
W
Environment
IR = 1.0 mA, Pin to PGND, AGND to PGND
B2B BV
VRM
IRM
Conditions
Symbol
V
CC
Min
0
52
52
±
12
10
500
100
1103
1050
1100
1050
95
70
Typ
Max
10
Units
V
dB
dB
V
V
nA
mW
W
W
pF
W
dB
nV/√Hz
%
1. Specifications apply to devices as a pair, as shown in the system diagram, unless otherwise noted as ‘for each stage’.
ESD CHARACTERISTICS
Pin
NMF3000FCT1G: A2, C2, A3, C3 to PGND
NMF3010FCT1G: B2, B3, A3 to PGND
NMF3000FCT1G: A2, C2, A3, C3 to PGND
NMF3010FCT1G: B2, B3, A3 to PGND
NMF3000FCT1G: All Pins Pairwise
NMF3010FCT1G: All Pins Pairwise
NMF3000FCT1G: All Pins Pairwise
NMF3010FCT1G: All Pins Pairwise
Level
4+
IEC 61000−4−2
4
IEC 61000−4−2
1
IEC 61000−4−2
1
IEC 61000−4−2
Type
Contact
Air
Contact
Air
Min
15
15
2.0
2.0
Units
kV
kV
kV
kV
COMPONENT MATCHING
Component
Resistors
Capacitors
Description
Amount of Relative Variation between Symmetrical Resistors / Capaci-
tors on the same Device
Max
2.0
2.0
Unit
%
%
http://onsemi.com
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
