54LVTH162245
DPACI
Features
•
•
•
•
•
•
•
•
•
•
Mixed-mode signal operation. (5V input/output with
3.3V supply).
Total dose hardness:Typical
100 krad (Si), depending upon space environment
A-port outputs have equivalent 22 ohm series
resistors. External resistors not required.
Unregulated battery operation down to 2.7V
Typical V
olp
(Output ground bounce)
<0.8V at Vcc= 3.3V, T
A
=25C.
Hot insertion supported.
Bus hold on data inputs eliminates the need for
external pullup/pulldown resistors.
Distributed Vcc and GND pins minimize high speed
switching noise.
Flow-through architecture optimizes PCB layout
Package:
48 pin flat pack shielded or unshielded package.
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
General Description
54LVTH162245 is a 16-bit (dual octal) non-inverting 3-state
transceiver designed for low voltage operation, with the
capability to interface with a TTL environment. These devices
can be used as two 8-bit transceivers, or one 16-bit
transceiver. The device allows data transmission from the A-
bus to the B-bus, or from the B-bus to the A-bus, depending
on the direction-control (DIR) input. The output-enable (OE)
input can be used to disable the device so that buses are
effectively isolated. The A-port outputs, which are designed
to source or sink up to 12ma, include equivalent 22 ohm
series resistors to reduce overshoot and undershoot. Active
bus-hold circuitry holds unused or undriven inputs at a valid
logic state. Use of pullup or pulldown resistors with the bus-
hold circuitry is not recommended.
DPACI incorporates radiation package shielding when
required (based upon orbit requirements).
1DIR
1B1
1B2
GND
1B3
1B4
1
48
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
LOGIC DIAGRAM
V
CC
1B5
1B6
GND
1B7
OE
D IR
DPACI
54LVTH
162245
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE
1B8
2B1
2B2
A BUS
B BUS
GND
2B3
2B4
V
CC
T O S E VE N O T H E R C H AN N E LS
2B5
2B6
GND
2B7
2B8
DPACI
2DIR
24
25
2251 Ward Ave., Simi Valley, CA 93065
Phone: (805) 581-9200
Fax: (805) 581-9790
Website:
www.dpaci.com
All data sheets are subject to change without notice
PAGE 1
54LVTH62245
REV. N/R
54LVTH162245
DPACI
ABSOLUTE MAXIMUM RATINGS
1
PARAMETER
Supply voltage range
Input voltage range (see note 2)
Voltage range applied to any output in the high
impedance or power-off state (see note 2)
Voltage range applied to any output in the high state
(see note 2)
Current into any output in the low state
B Port
A Port
Current into any output in the high state (see note 3)
A Port
B Port
Input clamp current
Output clamp current
Operating temperature range
Storage temperature range
Power dissipation
SYMBOL
V
cc
V
I
V
O
V
O
I
O
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
MIN
-0.5
-0.5
-0.5
-0.5
---
---
---
---
-50
-50
-55
-65
MAX
4.6
7.0
7.0
V
CC
+0.5
96
30
UNIT
V
V
V
V
mA
mA
I
IK
(V
I
<0)
I
OK
(V
O
<0)
T
A
T
S
PD
48
30
--
--
125
150
1
mA
mA
°C
°C
W
RECOMMENDED OPERATING CONDITIONS
4
PARAMETER
Supply Voltage
High-level input voltage
Low-level input voltage
Input voltage
High-level output current
A Port
B Port
Low level output current
A Port
B Port
Input transition rise or fall rate ( outputs enabled )
Power-up ramp rate
Operating temperature
SYMBOL
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
---
---
∆t/∆V
∆t/∆Vcc
T
A
200
-55
125
12
48
10
mA
ns/V
us/V
°C
MIN
2.7
2
--
--
---
---
MAX
3.6
--
0.8
5.5
-12
-24
UNIT
V
V
V
V
mA
1. Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under
"recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods
may affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. This current flows only when the output is in the high state and V
o
> V cc.
4. All unused control inputs of the devices must be held at V
CC
or GND to ensure proper device operation
DPACI
2251 Ward Ave., Simi Valley, CA 93065
Phone: (805) 581-9200
Fax: (805) 581-9790
Website:
www.dpaci.com
All data sheets are subject to change without notice
PAGE 2
54LVTH62245
REV. N/R
54LVTH162245
DPACI
DC ELECTRICAL CHARACTERISTICS
PARAMETER
V
IK
A port
V
OH
B port
A port
TEST CONDITIONS
V
CC
= 2.7V
I
I
= -18mA
V
CC
= 2.7V to 3.6V
V
CC
= 3V
V
CC
= 2.7V to 3.6V
V
CC
= 2.7V
V
CC
= 3V
V
CC
= 2.7V to 3.6V
V
CC
= 3V
V
CC
= 2.7V
V
CC
= 2.7V
B port
V
CC
= 3V
V
CC
= 3V
V
CC
= 3V
V
CC
= 3.6V,
V
CC
= 0 or 3.6V,
V
CC
= 3.6 V
V
CC
= 3 V
I
OH
= -100µA
I
OH
= -12mA
I
OH
= -100µA
I
OH
= -8mA
I
OH
= -24mA
I
OL
= 100µA
I
OL
= 12mA
I
OL
= 100µA
I
OL
= 24mA
I
OL
= 16mA
I
OL
= 32mA
I
OL
= 48mA
V
I
= V
CC
or GND
V
I
= 5.5 V
V
I
= 5.5 V
VI = V
CC
V
I
= 0
V
I
= 0.8 V
V
I
= 2 V
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
VCC=3.3V ± 10%,Ta = -55 to +125 °C,C
L
=50 pF,unless otherwise specified)
MIN
V
CC
-0.2
2
V
CC
-0.2
2.4
2
0.2
0.8
0.2
0.5
0.4
0.5
0.55
±1
10
20
5
-10
75
-75
--
--
--
--
--
--
--
±100
±100
0.19
5
0.19
0.3
--
--
8
15
µA
µA
µA
µA
V
MAX
-1.2
UNIT
V
V
V
OL
CONTROL
INPUTS
I
I
A or B
ports
I
I(hold)
I
OZPU3
I
OZPD3
A or B
ports
I
CC
∆I
CC
C
i
C
o
2
V
CC
= 0 to 1.5V, V
O
= 0.5 V to 3 V,
OE = don't care
V
CC
= 0 to 1.5V, V
O
= 0.5 V to 3 V,
OE = don't care
V
CC
= 3.6 V,
Outputs high
I
O
= 0,
Outputs low
V
I
= V
CC
or GND
Outputs disabled
V
CC
= 3 V to 3.6 V, One input at V
CC
-0.6 V,
Other inputs at V
CC
or GND
V
I
= 3 V or 0
V
O
= 3 V or 0
mA
mA
pF
pF
1 Unused pins at V
CC
or GND.
2 This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
3 Guaranteed by design
DPACI
2251 Ward Ave., Simi Valley, CA 93065
Phone: (805) 581-9200
Fax: (805) 581-9790
Website:
www.dpaci.com
All data sheets are subject to change without notice
PAGE 3
REV. N/R
54LVTH62245
54LVTH162245
DPACI
AC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
V
CC
= 3.3 V
± 0.3 V
MIN
MAX
1
3.5
1
1
1
1
1
1
1
1.5
1.5
1.5
1.2
3.5
4.3
4.2
4.8
4.8
5.5
5.4
5.5
5.5
5.8
6.3
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
(VCC =3.3V ± 10%,Ta = -55 to +125 °C,C
L
=50 pF,unless otherwise specified)
V
CC
= 2.7 V
MAX
4
3.9
5.3
4.5
5.9
5.5
7.2
6.4
5.8
5.8
6.5
6.3
ns
ns
ns
ns
ns
UNIT
Propogation Delay Time
A to B
Propogation Delay Time
B to A
Output Enable Time
OE to B
Output Enable Time
OE to A
Output Disable Time
OE to B
Output Disable Time
OE toA
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PHZ
t
PLZ
ns
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE
L
L
H
DIR
L
H
X
OPERATION
B data to A bus
A data to B bus
Isolation
DPACI
2251 Ward Ave., Simi Valley, CA 93065
Phone: (805) 581-9200
Fax: (805) 581-9790
Website:
www.dpaci.com
All data sheets are subject to change without notice
PAGE 4
54LVTH62245
REV. N/R
54LVTH162245
DPACI
LOAD CIRCUIT AND VOLTAGE WAVEFORMS
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C
L
includes probe and fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz. Z
O
= 50
Ω,
t
r
≤
2.5 ns, t
f
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
DPACI
2251 Ward Ave., Simi Valley, CA 93065
Phone: (805) 581-9200
Fax: (805) 581-9790
Website:
www.dpaci.com
All data sheets are subject to change without notice
PAGE 5
54LVTH62245
REV. N/R
Microchip MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
