May 2
nd
, 2014
Automotive Grade
AUIRS20302S
Pre-regulated Three Phase Gate Driver
Features
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3 phase gate driver for 24V & higher drives
Under-voltage lockout for all channels
Cross-conduction prevention logic
High voltage pre-regulator MOSFET
Power-on reset architecture
FAULT detection and Reset
Current sense comparator
Over-current blanking time
3.3V logic compatible
Matched propagation delay for all channels
Fully operational up to +200V
Floating channels for bootstrap operation
High negative transients immunity
Pre-regulated supply line for uP
Automotive qualified
Leadfree, RoSH Compliant
Product Summary
Topology
V
OFFSET
V
OUT
I
o+
& I
o-
(typical)
t
ON
& t
OFF
(typical)
3-phase gate driver
200 V
8.0 V – 17 V
0.20 A & 0.35 A
530 ns / 530 ns
0.7 us
Deadtime
(typical)
Package
Typical Applications
24V to 150V – 3 Phase Motor Drives
Automotive & Truck HVAC, PUMP
BLDC Motor Drives
SOIC 28WB
Typical Connection Diagram
+ Bat
VCP
Vb1
Vb2
Vb3
VPR
5V Reg
Ho1
Ho2
Ho3
Vs1
Vs2
Vs3
ASIC
or uP
Flt
Frst
EN
Hin3
Lin3
Hin2
Lin2
Hin1
Lin1
Vss Cap Can
AUIRS20302S
Lo1
Lo2
Lo3
Com
U
Ref
V
W
- Bat
1
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AUIRS20302S
Table of Contents
Typical Connection Diagram
Description/Feature Comparison
Qualification Information
Absolute Maximum Ratings
Recommended Operating Conditions
Static Electrical Characteristics
Dynamic Electrical Characteristics
Functional Block Diagram
Input/Output Pin Equivalent Circuit Diagram
Lead Definitions
Lead Assignments
Application Information and Additional Details
Parameter Temperature Trends
Package Details
Tape and Reel Details
Part Marking Information & Ordering Information
Page
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3
4
5
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6
7
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9
10
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21
22
23
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AUIRS20302S
Description
The AUIRS20302S is a three phase gate driver dedicated to BLDC motor drive up to 600W. Proprietary HVIC
technology enables this rugged monolithic design with enforced Automotive ESD & Latch-up grades. Primarily
designed for 24V battery application, its drive capability goes from 12v to 200V which cover all the abnormal
conditions of the vehicle. The gate drive circuitry features cross-conduction preventive and minimum dead-time
blocks. It is powered by a constant voltage so that the gate drives never exceed 17V including during Load Dump
condition.
An external MOSFET is acting as a pre-regulator. The inner charge pump and voltage control loop drives its gate in
order to keep the VPR pin constant when the battery voltage varies. The AUIRS20302S also features an over-
current protection that definitively shuts down all gates in case of short-circuit. The fault condition is reset by cycling
the FRST pin while the I.C is disabled. A blanking time, synchronized with each high side switch command, avoids
any premature triggering of the protection.
The logic control block of the AUIRS20302S is developed in order to support a fast and reliable 3 phase BLDC
design. For example, its inputs are compatible with the 3.3V logic processors and feature a short-pulse/noise
rejection filter. The 6 commands include matched propagation delays, shoot-through protections and minimum
dead-time. The bootstrap capacitor voltage of each phase is monitored independently (UVLO). Also, the maximum
gate voltage is controlled by the pre-regulator in all conditions. No linear or abnormal gate drive is possible. The
VPR pin can also supply the surrounding system components if the total consumption doesn’t exceed 0.1A.
3
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AUIRS20302S
Qualification Information
†
Automotive
(per AEC-Q100
††
)
Qualification Level
Comments: This family of ICs has passed an Automotive
qualification. IR’s Industrial and Consumer qualification level is
granted by extension of the higher Automotive level.
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
IC Latch-Up Test
RoHS Compliant
SOIC28
MSL3
†††
260°C
(per IPC/JEDEC J-STD-020)
M1 (+/-200V)
(per AEC-Q100-003)
H1B (+/-2000V)
(per AEC-Q100-002)
C3B (+/-500 V)
(per AEC-Q100-011)
Class II Level A
(per AEC-Q100-004)
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/
†
††
Exceptions to AEC-Q100 requirements are noted in the qualification report.
†††
Higher MSL ratings may be available for the specific package types listed here. Please contact your International
Rectifier sales representative for further information.
4
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AUIRS20302S
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute
voltages referenced to VSS, all currents are defined positive into any lead. An operation above the absolute maximum limit is not implied and
could damage the part. The thermal resistance and power dissipation ratings are measured under board mounted and free air conditions
Symbol
V
B1,2,3
V
HO1,2,3
V
S1,2,3
VPR
VCP
COM
V
LO1,2,3, / FLT
V
IN
Can/Cap
EN/Frst
dV/dt
Rth
JA
T
J
T
S
T
Reflow
Definition
High side floating supply voltage
High side floating output voltage
High side offset voltage
Low side supply voltage
Charge pump output voltage
Power ground
Low side output voltage LO#; FLT pin
Input pin voltage
(LIN#, HIN#,)
Over-current comparator inputs
Enable & Fault Reset inputs
High side floating voltage slew rate
Junction to ambient thermal resistance
Maximum operating junction temperature
Maximum storage temperature
Reflow max. temperature (60 sec.)
Min.
-0.3
V
S1,2,3
- 0.3
V
B 1,2,3
- 20
-0.3
-0.3
-5
-0.3
-0.3
-0.3
-0.3
—
—
-55
—
Max.
220
V
B 1,2,3
+ 0.3
V
B 1,2,3
+ 0.3
17
17
5
VPR + 0.3
VPR + 0.3
VPR + 0.3
VPR + 0.3
50
80
150
150
260
Units
V
V/ns
°C/W
°C
Recommended Operating Conditions
The Input/Output timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions.
All voltage parameters are referenced to VSS. The VS & COM offset rating are tested with all supplies biased at 15V differential.
Symbol
V
B1,2,3
V
HO 1,2,3
V
S 1,2,3
VPR
V
LO1,2,3
COM
V
HO1,2,3
V
LO1,2,3
V
IN
Vcan/cap
VCP
Definition
High side floating supply voltage
High side output voltage HO#
High side floating supply voltage
Low side supply voltage
Low side output voltage LO#
Power ground
High side output voltage
Low side output voltage
Logic input voltage LIN, HIN, EN, CAp, CAn, FRST
Common mode voltage on the CAN & CAP inputs
Charge Pump Output Voltage
Min.
V
S1,2,3
+6
V
S1,2,3
-0.3
(Note 1)
Max.
V
S1,2,3
+19
V
B1,2,3
+0.3
200
17
VPR+0.3
5
V
B1,2,3
VPR
VPR
5
15
Units
6
-0.3
-5
V
S1,2,3
COM
V
SS
-0.3
0
-
V
Note 1:
Logic operational for V
S
between COM -5V to COM +200V. Logic state held for V
S
of COM -5 to COM – V
BS.
(Please refer to the Design Tip DT97 -3 for more details).
5
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