DATASHEET
ISL78310
High Performance 1A LDO
The ISL78310 is a low dropout voltage, high-current, single
output LDO specified for 1A output current. This part operates
from input voltages down to 2.2V and up to 6V. The part offers
fixed and external resistor adjustable output voltages from
0.8V to 5V. Custom voltage options are available upon request.
For applications that desire to set the in-rush current to less
than the current limit of the part, or for applications that
require turn-on time control, an external capacitor can be
placed on the soft-start pin for maximum control. A supply-
independent ENABLE signal allows the part to be placed into a
low quiescent current shutdown mode. Sub-micron CMOS
process is used for this product family to deliver best-in-class
analog performance and overall value.
This CMOS LDO consumes significant lower quiescent (ground
pin) current as a function of load over bipolar LDOs, which
translates into higher efficiency and packages with smaller
footprints. Quiescent current is optimized to achieve a very fast
load transient response.
The ISL78310 is AEC-Q100 rated. The ISL78310 is rated for
the automotive temperature range (-40°C to +125°C).
FN7810
Rev 2.00
November 7, 2014
Features
• 2.2V to 6V input supply
• 130mV dropout voltage typical (at 1A)
• Fast load transient response
• ±0.2% initial V
OUT
accuracy
• Adjustable in-rush current limiting
• 58dB typical PSRR
• 63µV
RMS
output noise at V
OUT
= 1.8V
• Power-good feature
• 500mV feedback voltage
• Supply-independent 1V enable input threshold
• Short-circuit current protection
• 1A peak reverse current
• Over-temperature shutdown
• Any cap stable with minimum 10µF ceramic
• ±1.8% guaranteed V
OUT
accuracy for junction temperature
range from -40°C to +125°C
• Available in a 10 Lead DFN package
• Pb-free (RoHS compliant)
• AEC-Q100 qualified
Applications
• Core & I/O power
• Camera modules
• Post regulation of switched supplies
• Radio systems
• Infotainment systems
Pin Configuration
ISL78310
(10 LD 3x3 DFN)
TOP VIEW
VOUT
VOUT
SENSE/ADJ
PG
GND
10 VIN
9 VIN
PAD
8 NC
7 ENABLE
6 SS
1
2
3
4
5
FN7810 Rev 2.00
November 7, 2014
Page 1 of 14
ISL78310
Pin Descriptions
PIN #
1, 2
3
PIN NAME
VOUT
SENSE/ADJ
DESCRIPTION
Regulated output voltage. A minimum 10µF X5R/X7R output capacitor is required for stability. See
“External
Capacitor Requirements” on page 9
for more details.
For internally fixed VOUT option, this pin provides output voltage feedback. By connecting this pin to the output rail
at the load, small voltage drops caused by PCB trace resistance can be eliminated.
For the adjustable output voltage option, this pin is connected to the feedback resistor divider and provides voltage
feedback signals for the LDO to set the output voltage.
This is an open drain logic output used to indicate the status of the output voltage. Logic low indicates VOUT is not
in regulation. Must be grounded if not used.
Ground.
External capacitor on this pin adjusts start-up ramp and controls in-rush current.
VIN independent chip enable. TTL and CMOS compatible.
Do not connect this pin to ground or supply. Leave floating.
Input supply pin. A minimum 10µF X5R/X7R input capacitor is required for stability. See
“External Capacitor
Requirements” on page 9
for more details.
EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations. See
“Heatsinking
the DFN Package” on page 12
for more details.
4
5
6
7
8
9, 10
PG
GND
SS
ENABLE
NC
VIN
EPAD
Ordering Information
PART NUMBER
(Notes
1, 3, 4)
ISL78310ARAJZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. For other output voltages, contact Intersil Marketing.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see device information page for
ISL78310.
For more information on MSL please see techbrief
TB363.
DZAE
PART
MARKING
V
OUT
VOLTAGE
(Note
2)
ADJ
TEMP
RANGE (°C)
-40 to +125
PACKAGE
(Pb-Free)
10 Ld 3x3 DFN
PKG
DWG. #
L10.3x3
FN7810 Rev 2.00
November 7, 2014
Page 2 of 14
ISL78310
Typical Application Diagrams
2.5V ± 10%
10µF
10k
ISL78310
7
6
(Note
5)
4
9
10
V
IN
V
IN
V
OUT
V
OUT
SENSE/ADJ
1
2
3
10µF
100k
1.8V ± 1.8%
ENABLE
SS
GND
5
PG
FIGURE 1. FIXED TYPICAL APPLICATION DIAGRAM
2.5V ± 10%
10µF
9
10
V
IN
V
IN
ISL78310
V
OUT
V
OUT
1
2
10µF
2.6k
1.8V ± 1.8%
10k
SENSE/ADJ
1k
100k
7
6
ENABLE
PG
SS
GND
5
4
(Note
5)
FIGURE 2. ADJUSTABLE TYPICAL APPLICATION DIAGRAM
NOTE:
5. Used when large bulk capacitance required on V
OUT
for application.
FN7810 Rev 2.00
November 7, 2014
Page 3 of 14
ISL78310
ISL78310 Schematic Block Diagram
VIN
VOUT
FN7810 Rev 2.00
November 7, 2014
Page 4 of 14
ISL78310
Absolute Maximum Ratings
VIN relative to GND (Note
6)
. . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to + 6.5V
VOUT relative to GND (Note
6).
. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to + 6.5V
PG, ENABLE, SENSE/ADJ, SS
Relative to GND (Note
6)
. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to + 6.5V
Thermal Information
Thermal Resistance . . . . . . . . . . . . . . . . . . . .
JA
(°C/W)
JC
(°C/W)
10 Ld DFN Package (Notes
7, 8)
. . . . . . . .
48
7
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
(Notes
9, 10)
Junction Temperature Range (T
J
) (Note
9)
. . . . . . . . . . . .-40°C to +125°C
VIN relative to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.2V to 6V
VOUT range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800mV to 5V
PG, ENABLE, SENSE/ADJ, SS relative to GND . . . . . . . . . . . . . . .0V to + 6V
PG Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mA
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . .2.5kV
Machine Model (Tested per JESD-A115-A) . . . . . . . . . . . . . . . . . . . . . 250V
Charge Device Model (Tested per AEC-Q100-011) . . . . . . . . . . . . . . . . . 1kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. Absolute maximum voltage rating is defined as the voltage applied for a lifetime average duty cycle above 6V of 1%.
7.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
8. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
9. Extended operation at these conditions may compromise reliability. Exceeding these limits will result in damage. Recommended operating conditions
define limits where specifications are guaranteed.
10. Electromigration specification defined as lifetime average junction temperature of +110°C where max rated DC current = lifetime average current.
Electrical Specifications
Unless otherwise noted, V
IN
= V
OUT
+ 0.4V, V
OUT
= 1.8V, C
IN
= C
OUT
= 10µF, T
J
= +25°C, I
LOAD
= 0A.
Applications must follow thermal guidelines of the package to determine worst case junction temperature. Please refer to
“ISL78310 Schematic Block
Diagram” on page 4
and Tech Brief
TB379.
Boldface limits apply across the operating temperature range, -40°C to +125°C.
PARAMETER
DC CHARACTERISTICS
DC Output Voltage Accuracy
V
OUT
V
OUT
Options: 0.8V, 1.2V, 1.5V and 1.8V
2.2V
V
IN
< 3.6V; 0A < I
LOAD
1A
V
OUT
Options: 2.5V, 3.3V and 5.0V
V
OUT
+ 0.4V
V
IN
6V; 0A < I
LOAD
< 1A
Feedback Pin (ADJ Option Only)
DC Input Line Regulation
DC Output Load Regulation
Feedback Input Current
Ground Pin Current
I
Q
I
SHDN
V
DO
OCP
TSD
TSDn
SYMBOL
TEST CONDITIONS
MIN
(Note
11)
TYP
MAX
(Note
11)
UNITS
-1.8
0.2
1.8
%
-1.8
491
0.2
500
1.8
509
1
%
mV
%
%
V
ADJ
V
OUT
/
V
IN
V
OUT
/
I
OUT
2.2V
V
IN
6V, 0A < I
LOAD
< 1A
V
OUT
+ 0.5V < V
IN
< 5V
0A < I
LOAD
< 1A, All voltage options
V
ADJ
= 0.5V
I
LOAD
= 0A, 2.2V < V
IN
< 6V
I
LOAD
= 1A, 2.2V < V
IN
< 6V
ENABLE Pin = 0V, V
IN
= 6V
I
LOAD
= 1A, V
OUT
= 2.5V
V
OUT
= 0V, 2.2V < V
IN
< 6V
2.2V < V
IN
< 6V
2.2V < V
IN
< 6V
-1
0.01
3
5
0.2
130
1.75
160
30
1
5
7
12
212
µA
mA
mA
µA
mV
A
°C
°C
Ground Pin Current in Shutdown
Dropout Voltage (Note
12)
Output Short Circuit Current
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
(Rising Threshold)
AC CHARACTERISTICS
Input Supply Ripple Rejection
PSRR
f = 1kHz, I
LOAD
= 1A; V
IN
= 2.2V
f = 120Hz, I
LOAD
= 1A; V
IN
= 2.2V
I
LOAD
= 1A, BW = 10Hz < f < 100kHz
58
72
63
dB
dB
µV
RMS
Output Noise Voltage
FN7810 Rev 2.00
November 7, 2014
Page 5 of 14
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