NCP1030, NCP1031
Low Power PWM Controller
with On- Chip Power Switch
-
and Startup Circuits for
48 V Telecom Systems
The NCP1030 and NCP1031 are a family of miniature high-
-voltage
monolithic switching regulators with on-
-chip Power Switch and Startup
Circuits. The NCP103x family incorporates in a single IC all the active
power, control logic and protection circuitry required to implement, with
minimal external components, several switching regulator applications,
such as a secondary side bias supply or a low power dc- converter.
-dc
This controller family is ideally suited for 48 V telecom, 42 V automotive
and 12 V input applications. The NCP103x can be configured in any
single-
-ended topology such as forward or flyback. The NCP1030 is
targeted for applications requiring up to 3 W, and the NCP1031 is
targeted for applications requiring up to 6 W.
The internal error amplifier allows the NCP103x family to be easily
configured for secondary or primary side regulation operation in
isolated and non-
-isolated configurations. The fixed frequency oscillator
is optimized for operation up to 1 MHz and is capable of external
frequency synchronization, providing additional design flexibility. In
addition, the NCP103x incorporates individual line undervoltage and
overvoltage detectors, cycle by cycle current limit and thermal
shutdown to protect the controller under fault conditions. The preset
current limit thresholds eliminate the need for external sensing
components.
Features
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MARKING
DIAGRAMS
8
8
1
Micro8t
DM SUFFIX
CASE 846A
1
8
8
1
SO-
-8
D SUFFIX
CASE 751
N1031
ALYW
G
1030
AYWG
G
1
1
DFN-
-8
MN SUFFIX
CASE 488AF
NCP
1031
ALYW
G
G
On Chip High 200 V Power Switch Circuit and Startup Circuit
Internal Startup Regulator with Auxiliary Winding Override
Operation up to 1 MHz
External Frequency Synchronization Capability
Frequency Fold-
-down Under Fault Conditions
Trimmed
2%
Internal Reference
Line Undervoltage and Overvoltage Detectors
Cycle by Cycle Current Limit Using SENSEFET
Active LEB Circuit
Overtemperature Protection
Internal Error Amplifier
Pb-
-Free Packages are Available
POE (Power Over Ethernet)/PD. Refer to Application Note AND8247.
Secondary Side Bias Supply for Isolated dc- Converters
-dc
Stand Alone Low Power dc- Converter
-dc
Low Power Bias Supply
Low Power Boost Converter
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G
= Pb--Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
GND
C
T
V
FB
COMP
1
2
3
4
(Top View)
8
7
6
5
V
DRAIN
V
CC
UV
OV
GND
C
T
V
FB
COMP
(Top View)
EP Flag
V
DRAIN
V
CC
UV
OV
Typical Applications
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
Semiconductor Components Industries, LLC, 2010
December, 2010 - Rev. 10
-
1
Publication Order Number:
NCP1030/D
NCP1030, NCP1031
GND
R
SENSE
Disable
Internal Bias
I
1
Current Limit
Comparator
+
--
LEB
+
7.5 V/10 V
--
--
+
Thermal
Shutdown
S
Reset
Q Dominant
Latch
R
I
START
V
DRAIN
V
CC
16 V
+
--
+
--
C
T
10 V
C
T
Ramp
+
50 mV
--
10 V
+
--
+
--
2.5 V
+
3.0 V/3.5 V --
I
2
= 3I
1
S
Reset Q
Dominant
R Latch
PWM Latch
6.5 V
UV
VFB
Error Amplifier
10 V +
--
+
2.5 V
--
PWM Comparator
COMP
2 kΩ
10 V
4.5 V
Figure 1. NCP1030/31 Functional Block Diagram
FUNCTIONAL PIN DESCRIPTION
Pin
1
2
Name
GND
C
T
Function
Ground
Oscillator Frequency
Selection
Ground reference pin for the circuit.
An external capacitor connected to this pin sets the oscillator frequency up to 1 MHz.
The oscillator can be synchronized to a higher frequency by charging or discharging
C
T
to trip the internal 3.0 V/3.5 V comparator. If a fault condition exists, the power
switch is disabled and the frequency is reduced by a factor of 7.
The regulated voltage is scaled down to 2.5 V by means of a resistor divider.
Regulation is achieved by comparing the scaled voltage to an internal 2.5 V reference.
Requires external compensation network between COMP and V
FB
pins. This pin is
effectively grounded if faults are present.
Line voltage (V
in
) is scaled down using an external resistor divider such that the OV
voltage reaches 2.5 V when line voltage reaches its maximum operating voltage.
Line voltage is scaled down using an external resistor divider such that the UV
voltage reaches 2.5 V when line voltage reaches its minimum operating voltage.
This pin is connected to an external capacitor for energy storage. During Turn--On, the
startup circuit sources current to charge the capacitor connected to this pin. When the
supply voltage reaches V
CC(on)
, the startup circuit turns OFF and the power switch is
enabled if no faults are present. An external winding is used to supply power after
initial startup to reduce power dissipation. V
CC
should not exceed 16 V.
This pin directly connects the Power Switch and Startup Circuits to one of the
transformer windings. The internal High Voltage Power Switch Circuit is connected
between this pin and ground. V
DRAIN
should not exceed 200 V.
Description
3
4
5
6
7
V
FB
COMP
OV
UV
V
CC
Feedback Input
Error Amplifier Compensation
Line Overvoltage Shutdown
Line Undervoltage Shutdown
Supply Voltage
8
V
DRAIN
Power Switch and
Startup Circuits
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2
+
--
--
+
+
--
One Shot
I Pulse O
10 V
OV
10 V
NCP1030, NCP1031
C
T
Ramp
COMP Voltage
C
T
Charge
Signal
PWM
Comparator
Output
PWM Latch
Output
Power Switch
Circuit Gate Drive
Leading Edge
Blanking Output
Normal PWM Operating Range
Output Overload
Current Limit
Threshold
Current Limit
Propagation Delay
Figure 2. Pulse Width Modulation Timing Diagram
V
CC(on)
V
CC(off)
V
CC(reset)
0V
I
START
0 mA
3.0 V
V
UV
0V
2.5 V
V
FB
0V
V
DRAIN
0V
Power--up &
standby Operation
Normal Operation
Output Overload
Figure 3. Auxiliary Winding Operation with Output Overload Timing Diagram
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3
NCP1030, NCP1031
MAXIMUM RATINGS
Rating
Power Switch and Startup Circuits Voltage
Power Switch and Startup Circuits Input Current
-- NCP1030
-- NCP1031
V
CC
Voltage Range
All Other Inputs/Outputs Voltage Range
V
CC
and All Other Inputs/Outputs Current
Operating Junction Temperature
Storage Temperature
Power Dissipation (T
J
= 25C, 2.0 Oz., 1.0 Sq Inch Printed Circuit Copper Clad)
DM Suffix, Plastic Package Case 846A
D Suffix, Plastic Package Case 751
MN Suffix, Plastic Package Case 488AF
Thermal Resistance, Junction to Air (2.0 Oz., 1.0 Sq Inch Printed Circuit Copper Clad)
DM Suffix, Plastic Package Case 846A
D Suffix, Plastic Package Case 751
MN Suffix, Plastic Package Case 488AF
R
θJA
Symbol
V
DRAIN
I
DRAIN
Value
--0.3 to 200
1.0
2.0
--0.3 to 16
--0.3 to 10
100
--40 to 150
--55 to 150
0.582
0.893
1.453
172
112
69
Unit
V
A
V
CC
V
IO
I
IO
T
J
T
stg
V
V
mA
C
C
W
C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
A. This device contains ESD protection circuitry and exceeds the following tests:
Pins 1--7: Human Body Model 2000V per MIL--STD--883, Method 3015.
Pins 1--7:
Machine Model Method 200 V.
Pin 8 is connected to the High Voltage Startup and Power Switch Circuits and rated only to the maximum voltage rating of the part, or 200 V.
B. This device contains Latchup protection and exceeds
±100
mA per JEDEC Standard JESD78.
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4
NCP1030, NCP1031
DC ELECTRICAL CHARACTERISTICS
(V
DRAIN
= 48 V, V
CC
= 12 V, C
T
= 560 pF, V
UV
= 3 V, V
OV
= 2 V, V
FB
= 2.3 V,
V
COMP
= 2.5 V, T
J
= --40C to 125C, typical values shown are for T
J
= 25C unless otherwise noted.) (Note 1)
Characteristics
STARTUP CONTROL
Startup Circuit Output Current (V
FB
= V
COMP
)
NCP1030
T
J
= 25C
V
CC
= 0 V
V
CC
= V
CC(on)
-- 0.2 V
T
J
= --40C to 125C
V
CC
= 0 V
V
CC
= V
CC(on)
-- 0.2 V
NCP1031
T
J
= 25C
V
CC
= 0 V
V
CC
= V
CC(on)
-- 0.2 V
T
J
= --40C to 125C
V
CC
= 0 V
V
CC
= V
CC(on)
-- 0.2 V
V
CC
Supply Monitor (V
FB
= 2.7 V)
Startup Threshold Voltage (V
CC
Increasing)
Minimum Operating V
CC
After Turn--on (V
CC
Increasing)
Hysteresis Voltage
Undervoltage Lockout Threshold Voltage, V
CC
Decreasing (V
FB
= V
COMP
)
Minimum Startup Voltage (Pin 8)
I
START
= 0.5 mA, V
CC
=V
CC(on)
-- 0.2 V
ERROR AMPLIFIER
Reference Voltage (V
COMP
= V
FB
, Follower Mode)
T
J
= 25C
T
J
= --40C to 125C
Line Regulation (V
CC
= 8 V to 16 V, T
J
= 25C)
Input Bias Current (V
FB
= 2.3 V)
COMP Source Current
COMP Sink Current (V
FB
= 2.7 V)
COMP Maximum Voltage (I
SRC
= 0
mA)
COMP Minimum Voltage (I
SNK
= 0
mA,
V
FB
= 2.7 V)
Open Loop Voltage Gain
Gain Bandwidth Product
LINE UNDER/OVERVOLTAGE DETECTOR
Undervoltage Lockout (V
FB
= V
COMP
)
Voltage Threshold (V
in
Increasing)
Voltage Hysteresis
Input Bias Current
Overvoltage Lockout (V
FB
= V
COMP
)
Voltage Threshold (V
in
Increasing)
Voltage Hysteresis
Input Bias Current
V
UV
V
UV(hys)
I
UV
V
OV
V
OV(hys)
I
OV
2.400
0.075
--
2.400
0.075
--
2.550
0.175
0
2.550
0.175
0
2.700
0.275
1.0
2.700
0.275
1.0
V
V
mA
V
V
mA
V
REF
2.45
2.40
--
--
80
200
4.5
--
--
--
2.5
2.5
1.0
0.1
110
550
--
--
80
1.0
2.55
2.60
5.0
1.0
140
900
--
1.0
--
--
V
I
START
10
6.0
8.0
2.0
12.5
8.6
--
--
15
12
16
13
mA
Symbol
Min
Typ
Max
Unit
13
8.0
11
4.0
V
CC(on)
V
CC(off)
V
CC(hys)
V
CC(reset)
V
START(min)
9.6
7.0
--
6.0
--
16
12
--
--
10.2
7.6
2.6
6.6
16.8
19
16
21
18
10.6
8.0
--
7.0
18.5
V
V
V
REG
LINE
I
VFB
I
SRC
I
SNK
V
C(max)
V
C(min)
A
VOL
GBW
mV
mA
mA
mA
V
V
dB
MHz
1. Production testing for NCP1030DMR2 is performed at 25C only; limits at --40C and 125C are guaranteed by design.
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