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5962-9561311HTA

产品描述Standard SRAM, 512KX8, 45ns, CMOS, CDSO32, CERAMIC, SOJ-32
产品类别存储    存储   
文件大小226KB,共43页
制造商White Microelectronics
下载文档 详细参数 全文预览

5962-9561311HTA概述

Standard SRAM, 512KX8, 45ns, CMOS, CDSO32, CERAMIC, SOJ-32

5962-9561311HTA规格参数

参数名称属性值
包装说明CERAMIC, SOJ-32
Reach Compliance Codeunknown
最长访问时间45 ns
JESD-30 代码R-CDSO-J32
JESD-609代码e0
长度21.02 mm
内存密度4194304 bit
内存集成电路类型STANDARD SRAM
内存宽度8
功能数量1
端子数量32
字数524288 words
字数代码512000
工作模式ASYNCHRONOUS
最高工作温度125 °C
最低工作温度-55 °C
组织512KX8
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码SOJ
封装形状RECTANGULAR
封装形式SMALL OUTLINE
并行/串行PARALLEL
认证状态Not Qualified
座面最大高度3.96 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层TIN LEAD
端子形式J BEND
端子节距1.27 mm
端子位置DUAL
宽度11.24 mm
Base Number Matches1

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REVISIONS
LTR
A
B
C
D
DESCRIPTION
Added device types 05 through 10. Added case outlines X, Z, and T.
Redrew entire document.
Added device types 11 through 13. Added case outline U.
Made changes in accordance with NOR 5962-R289-97. -sld
Table I; Changed the max limit for the operating supply current test
I
CC
for device types 05-10 from 130 mA to 135 mA. Table I; Changed
the max limit for data retention current (I
CCDR1
) for device types 05-10
from 3.0 mA to 7.0 mA. Add vendor cage 88379 for device types 11,
12, and 13 per letter dated 1 MAY 1997. -sld
Add device type 14.
Changes to case outlines U and X.
Add: note to paragraph 1.2.2 and table I, conditions. Add device types
15 through 27, case outlines M, N, and 9, vendor CAGE code
0EU86, condition D to paragraphs 4.2.a.1 and 4.3.3.b.1. Changes to
table I and dimensions to case outlines T, U, Y, and Z. Table I, add
note 3 to C
IN
and C
OUT
.
Table I; Changed the I
OL
from 8 mA to 6 mA for device types 07-14
and 21-27 for the V
OL
test. Added device types 28, 29, and 30.
Editorial changes throughout. -sld
DATE (YR-MO-DA)
96-08-23
96-10-22
97-04-28
98-02-18
APPROVED
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
E
F
G
98-06-22
99-04-30
01-02-08
K. A. Cottongim
K. A. Cottongim
Raymond Monnin
H
04-05-28
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
H
15
H
16
H
17
H
18
H
19
H
20
H
21
H
1
H
22
H
2
H
23
H
3
H
24
H
4
H
25
H
5
H
26
H
6
H
27
H
7
H
28
H
8
H
29
H
9
H
30
H
10
H
31
H
11
H
12
H
13
H
14
REV
SHEET
PREPARED BY
Steve L. Duncan
CHECKED BY
Michael C. Jones
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil/
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, MEMORY, DIGITAL, SRAM,
512K x 8-BIT, MONOLITHIC SILICON
DRAWING APPROVAL DATE
95-11-07
REVISION LEVEL
H
SIZE
A
SHEET
CAGE CODE
67268
1 OF
31
5962-95613
DSCC FORM 2233
APR 97
5962-E263-04

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