+5 V power supply. All pins must be the rising edge of CLK. The LSB is SI
0
(Figure 2).
connected.
*Input and output registers run at full
clock rate
Clock
CLK — Master Clock
Outputs
SO
15-0
Data Output
The rising edge of CLK strobes all regis- The current 16-bit result is available on
ters. All timing specifications are refer- the SO
15-0
outputs. The LF2242’s limiter
ensures that a valid full-scale (7FFF
enced to the rising edge of CLK.
positive or 8000 negative) output will be
generated in the event of an internal
SYNC — Synchronization Control
overflow. The LSB is SO
0
(Figure 2).
Incoming data is synchronized by hold-
ing SYNC HIGH on CLK
N
, and then by
bringing SYNC LOW on CLK
N+1
with
the first word of input data. SYNC is held
LOW until resynchronization is desired,
or it can be toggled at half the clock rate.
For interpolation (INT = LOW), input
data should be presented at the first ris-
ing edge of CLK for which SYNC is LOW
and then at every alternate rising edge of
CLK thereafter. SYNC is inactive if DEC
and INT are equal (pass-through mode).
Video Imaging Products
2
08/16/2000–LDS.2242-K
LF2242
DEVICES INCORPORATED
12/16-bit Half-Band Interpolating/
Decimating Digital Filter
RND
2-0
— Rounding Control
The rounding control inputs set the posi-
tion of the effective LSB of the output data
by adding a rounding bit to the internal
bit position that is one below that speci-
fied by RND
2-0
. All bits below the effec-
tive LSB position are subsequently ze-
roed (Table 2).
TCO — Two’s Complement Format
Control
The TCO input determines the format of
the output data. When TCO is HIGH, the
output data is presented in two’s comple-
ment format. When TCO is LOW, the
data is in inverted offset binary format
(all output bits are inverted except the
MSB — the MSB is unchanged).
OE — Output Enable
When the OE signal is LOW, the current
data in the output register is available on
the SO
15-0
pins. When OE is HIGH, the
outputs are in a high-impedance state.
F
IGURE
2. I
NPUT AND
O
UTPUT
F
ORMATS
Two’s Complement Input Format
11 10 9 8
–2
0
2
–1
2
–2
2
–3
(Sign)
3 2 1 0
2
–8
2
–9
2
–10
2
–11
Two’s Complement Output Format (TCO = 1, Non-interpolate)
15 14 13 12
–2
0
2
–1
2
–2
2
–3
(Sign)
3 2 1 0
2
–12
2
–13
2
–14
2
–15
Two’s Complement Output Format (TCO = 1, Interpolate)
15 14 13 12
–2
1
2
0
2
–1
2
–2
(Sign)
3 2 1 0
2
–11
2
–12
2
–13
2
–14
Inverted Offset Binary Output Format (TCO = 0, Non-interpolate)
15 14 13 12
2
0
2
–1
2
–2
2
–3
(Sign)
3 2 1 0
2
–12
2
–13
2
–14
2
–15
Inverted Offset Binary Output Format (TCO = 0, Interpolate)
15 14 13 12
2
1
2
0
2
–1
2
–2
(Sign)
3 2 1 0
2
–11
2
–12
2
–13
2
–14
T
ABLE
2. R
OUNDING
F
ORMAT
RND
2-0
000
001
010
011
100
101
110
111
SO
15
X
X
X
X
X
X
X
X
SO
14
X
X
X
X
X
X
X
X
SO
13
X
X
X
X
X
X
X
X
SO
12
X
X
X
X
X
X
X
X
•••
•••
•••
•••
•••
•••
•••
•••
•••
SO
8
X
X
X
X
X
X
X
X
SO
7
X
X
X
X
X
X
X
R
SO
6
X
X
X
X
X
X
R
0
SO
5
X
X
X
X
X
R
0
0
SO
4
X
X
X
X
R
0
0
0
SO
3
X
X
X
R
0
0
0
0
SO
2
X
X
R
0
0
0
0
0
SO
1
X
R
0
0
0
0
0
0
SO
0
R
0
0
0
0
0
0
0
'R' indicates the half-LSB rounded bit (effective LSB position)
Video Imaging Products
3
08/16/2000–LDS.2242-K
LF2242
DEVICES INCORPORATED
12/16-bit Half-Band Interpolating/
Decimating Digital Filter
M
AXIMUM
R
ATINGS
Above which useful life may be impaired (Notes 1, 2, 3, 8)
Storage temperature ........................................................................................................... –65°C to +150°C
Operating ambient temperature ........................................................................................... –55°C to +125°C
V
CC
supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V
Input signal with respect to ground ............................................................................... –0.5 V to V
CC
+ 0.5 V
Signal applied to high impedance output ...................................................................... –0.5 V to V
CC
+ 0.5 V
Output current into low outputs ............................................................................................................. 25 mA
Latchup current ............................................................................................................................... > 400 mA
O
PERATING
C
ONDITIONS
To meet specified electrical and switching characteristics
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