Data Sheet
February 1999
LG1602 Decision Circuit
Features
s
s
s
s
Functional Description
The LG1602 is a gallium arsenide (GaAs) decision
circuit. It features a sensitive broadband input ampli-
fier and a D-type flip-flop that retimes and regener-
ates an input data stream that is weakened by noise,
jitter, and intersymbol interference.
The LG1602 has complementary 50
Ω
output buff-
ers.
dc feedback ensures input threshold control for input
levels as low as 25 mV, when using dc balanced
input data. The LG1602 is available in a hermetically
sealed 16-lead glass-metal surface-mount package.
V
+OUT
V
–OUT
Operation up to 3 Gbits/s
Good sensitivity to low input signals
Low power dissipation
Surface-mount package
Applications
s
s
s
SONET/SDH transmission systems
Digital video transmission
Digital test instruments
V
–REF
V
–IN
V
+IN
V
+REF
110 pF
25 kΩ
50
Ω
D
50
Ω
25 kΩ
110 pF
D
Q
V
SS
2 pF
V
–CLK
50
Ω
50
Ω
V
+CLK
2 pF
GND
5-7667(F)r.3
Figure 1. LG1602 Functional Diagram
LG1602 Decision Circuit
Data Sheet
February 1999
Pin Information
GND GND
NC
NC
16
15
14
13
1
GND
2
V
+CLK
3
V
–CLK
4
V
SS
12
V
+REF
11
V
+IN
10
V
–IN
9
V
–REF
5
6
7
8
V
–OUT
V
+OUT
NC
NC
12-3223(F).ar.2
Figure 2. Pin Diagram
Table 1. Pin Descriptions
Pin
2
3
4
5
6
9
10
11
12
1, 15, 16,
Package
Back
7, 8, 13, 14
Symbol
V
+CLK
V
–CLK
V
SS
V
–OUT
V
+OUT
V
–REF
V
–IN
V
+IN
V
+REF
GND
Name/Description
Clock Input.
May be grounded, if not used.
Clock Input.
May be grounded, if not used.
dc Supply Voltage.
Negative Data Output.
ac couple or terminate with 50
Ω
to GND.
Positive Data Output.
ac couple or terminate with 50
Ω
to GND.
Data Negative Reference.
Bypass to GND with 0.047 µF in series with 5
Ω
.
Negative Data Input.
ac couple with 0.047 µF.
Positive Data Input.
ac couple with 0.047 µF.
Data Positive Reference.
Bypass to GND with 0.047 µF in series with 5
Ω
.
Ground.
For optimum performance, package back should contact board ground
plane.
No Connection.
NC
2
Lucent Technologies Inc.
Data Sheet
February 1999
LG1602 Decision Circuit
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent or latent damage to the device. These
are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in
excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for
extended periods can adversely affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Supply Voltage Range (V
SS
)
Power Dissipation
Voltage (all pins)
Clock Input (V
+CLK
, V
–CLK
)
V
+REF
– V
+IN
V
–REF
– V
–IN
Storage Temperature Range
Operating Case Temperature Range
Min
0.5
—
0.5
—
—
—
–40
0
Max
–7
1
V
SS
±2
±2
±2
125
100
Unit
V
W
V
V
V
V
°C
°C
Recommended Operating Conditions
Table 3. Recommended Operating Conditions
Parameter
Case Temperature
Power Supply
Symbol
t
CASE
V
SS
Min
0
–4.7
Max
75
–5.7
Unit
°C
V
Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid expo-
sure to electrostatic discharge (ESD) during handling and mounting. Lucent employs a human-body model (HBM)
and a charged-device model (CDM) for ESD-susceptibility testing and protection design evaluation. No industry-
wide standard has been adopted for the CDM. However, a standard HBM (resistance = 1500
Ω,
capacitance =
100 pF) is widely used and, therefore, can be used for comparison purposes. The HBM ESD threshold presented
here was obtained by using these circuit parameters.
Table 4. ESD Threshold
HBM ESD Threshold
Device
LG1602
Voltage
≥200
V
Mounting and Connections
Certain precautions must be taken when using solder. For installation using a constant temperature solder, tem-
peratures of under 300 °C may be employed for periods of time up to 5 seconds, maximum. For installation with a
soldering iron (battery operated or nonswitching only), the soldering tip temperature should not be greater than
300 °C and the soldering time for each lead must not exceed 5 seconds.
Lucent Technologies Inc.
3
LG1602 Decision Circuit
Data Sheet
February 1999
Electrical Characteristics
Bit rate = 2.488 Mbits/s NRZ and data pattern = 2
23
– 1 PRBS, unless otherwise indicated. See Figure 3 for the tim-
ing and signal levels and Figure 5 for the test circuit, when using the TF1001A test fixture.
Note:
Minimum and maximum values are testing requirements. Typical values are characteristics of the device
and are the result of engineering evaluations. Typical values are for information purposes only and are not
part of the testing requirements.
Parameter
Symbol
Conditions
LG1602AXB
t
CASE =
25 °C
V
SS
= –5.2 V
LG1602BXB
t
CASE =
0 °C—
75 °C
V
SS
= –4.9 V to
–5.5 V
Max Min Typ Max
2.5
—
—
—
800 200
900
—
—
—
20
—
360
150
510
330
185
–73
1200
600
—
15
—
—
—
—
115
20
—
900
—
205
—
—
205
–53
—
—
100
—
—
—
—
—
—
—
Unit
Maximum Bit Rate
Data Input Voltage
|
V
H
– <V>| +
|<V>
– V
L
|
Data Input Sensitivity
Clock Input Voltage
|
V
H
– <V>| +
|<V>
– V
L
|
Clock Phase Margin
Clock Phase Minimum
Clock Phase Maximum
Clock Phase Center
Setup Time
Hold Time
Propagation Delay
Output Voltage (V
H
– V
L
)
Output Transition Time
Output Return Loss
Data Input Return Loss
—
—
—
—
—
t1
t2
t
C
t
S
t
H
t
PD
—
—
—
—
BER = 10
–9
t
R
, t
F
≤
165 ps (20%—80%)
BER = 10
–9
, limited clock
phase margin
t
R
, t
F
≤
85 ps (20%—80%),
duty cycle = 50% ± 10%
—
Data transition to negative
edge of CLOCK IN
Data transition to negative
edge of CLOCK IN
Data transition to negative
edge of CLOCK IN
Valid input data to negative
edge of CLOCK IN
Negative edge CLOCK IN to
valid DATA IN
CLOCK IN negative edge to
output transition
Outputs ac coupled (see
Figure 5)
20%—80%, outputs ac cou-
pled
1 MHz—2 GHz, outputs ac
coupled
100 kHz—300 kHz
0.3 MHz—1500 MHz
1.5 GHz—1.8 GHz
2.4 GHz—2.6 GHz
—
Junction to case bottom
Min
3
200
—
500
250
—
—
—
—
—
—
500
—
—
—
—
—
—
—
—
Typ
—
—
20
—
360
—
—
330
185
–73
1200
600
—
15
10
15
15
15
115
20
GHz
mV
mV
mV
ps
ps
ps
ps
ps
ps
ps
mV
ps
dB
dB
dB
dB
dB
mA
°C/W
1000 200
—
—
—
—
—
—
—
—
100
—
—
—
—
—
—
—
250
—
455
—
—
—
—
500
—
—
10
15
15
15
—
—
Clock Input Return Loss
Power Supply Current
Thermal Resistance
—
—
—
4
Lucent Technologies Inc.
Data Sheet
February 1999
LG1602 Decision Circuit
Electrical Characteristics
(continued)
t
1
t
2
V
H
DATA IN
D0
D1
D2
<V>
V
L
V
H
CLOCK IN
t
PD
DATA OUT
D0
<V>
V
L
V
H
0
V
L
5-7668(F)r.2
Figure 3. Timing Diagram
50
Ω
≥0.047 µF
50
Ω
≥0.047 µF
COUPLING CAPACITORS
OPTIONAL
0.047
µF
0.1
µF
V
+OUT
6
110 pF
V
–REF
9
50
Ω
V
–IN
0.047
µF
50
Ω
5
Ω
V
+REF
12
25 kΩ
CLOCK
0.047
µF
110 pF
1, 15, 16
TF1001A FIXTURE BOUNDARY
5-7669(F)r.2
V
–OUT
5
4
5
Ω
V
SS
–5.2 V +
2 pF
–
3
50
Ω
V
–CLK
5
Ω
25 kΩ
Q
D
D
50
Ω
2 pF
10
11
V
+IN
50
Ω
2
V
+CLK
50
Ω
GND
CLOCK
Figure 4. Test Circuit
Lucent Technologies Inc.
5
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