LH534A00
FEATURES
•
524,288 words
×
8 bit organization
•
Access time: 120 ns (MAX.)
•
Static operation
•
TTL compatible I/O
•
Three-state outputs
•
Single +5 V power supply
•
Power consumption:
Operating: 357.5 mW (MAX.)
Standby: 550
µW
(MAX.)
•
Package:
32-pin, 8
×
20 mm
2
TSOP (Type I)
DESCRIPTION
The LH534A00 is a 4M-bit mask-programmable ROM
organized as 524,288
×
8 bits. It is fabricated using
silicon-gate CMOS process technology.
A
11
A
9
A
8
A
13
A
14
A
17
NC
V
CC
A
18
A
16
A
15
A
12
A
7
A
6
A
5
A
4
CMOS 4M (512K
×
8) MROM
PIN CONNECTIONS
32-PIN TSOP (Type I)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
D
7
D
6
D
5
D
4
D
3
GND
D
2
D
1
D
0
A
0
A
1
A
2
A
3
534A00-1
Figure 1. Pin Connections for TSOP Package
1
LH534A00
CMOS 4M MROM
A
18
9
A
17
6
A
16
A
15
A
14
A
13
10
11
5
4
A
11
1
A
10
31
A
9
A
8
A
7
A
6
2
3
13
14
A
5
15
A
4
16
A
3
17
A
2
18
A
1
19
A
0
20
ADDRESS BUFFER
A
12
12
ADDRESS DECODER
MEMORY
MATRIX
(524,288 x 8)
COLUMN SELECTOR
SENSE AMPLIFIER
CE 30
CE
BUFFER
TIMING
GENERATOR
OUTPUT BUFFER
OE 32
OE
BUFFER
8
24
V
CC
GND
21
D
0
22
D
1
23
D
2
25
D
3
26
D
4
27
D
5
28
D
6
29
D
7
534A00-2
Figure 2. LH534A00 Block Diagram
PIN DESCRIPTION
SIGNAL
PIN NAME
SIGNAL
PIN NAME
A
0
– A
18
D
0
– D
7
CE
Address input
Data output
Chip enable input
OE
V
CC
GND
Output enable input
Power supply (+5 V)
Ground
2
CMOS 4M MROM
LH534A00
TRUTH TABLE
CE
OE
DATA OUTPUT
SUPPLY CURRENT
H
L
X
H
L
High-Z
High-Z
Output
Standby
Operating
Operating
NOTE:
X = H or L, High-Z = High-impedance
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
UNIT
Supply voltage
Input voltage
Output voltage
Operating temperature
Storage temperature
V
CC
V
IN
V
OUT
Topr
Tstg
– 0.3 to +7.0
– 0.3 to V
CC
+ 0.3
– 0.3 to V
CC
+ 0.3
–20 to +70
–65 to +150
V
V
V
°C
°C
RECOMMENDED OPERATING CONDITIONS (T
A
= –20°C to +70°C)
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Supply voltage
V
CC
4.5
5.0
5.5
V
DC CHARACTERISTICS (V
CC
= 5 V
±10%,
T
A
= –20°C to +70°C)
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
UNIT
NOTE
Input ‘High’ voltage
Input ‘Low’ voltage
Output ‘High’ voltage
Output ‘Low’ voltage
Input leakage current
Output leakage current
V
IH
V
IL
V
OH
V
OL
| I
Ll
|
| I
LO
|
I
CC1
I
CC2
I
CC3
I
CC4
I
OH
= –400
µA
I
OL
= 2.0 mA
V
IN
= 0 V to V
CC
V
OUT
= 0 V to V
CC
t
RC
= 120 ns
t
RC
= 1
µs
t
RC
= 120 ns
t
RC
= 1
µs
CE = V
IH
CE = V
CC
– 0.2 V
f = 1 MHz
T
A
= 25°C
2.2
– 0.3
2.4
V
CC
+ 0.3
0.8
V
V
V
0.4
10
10
65
50
60
45
3
100
10
10
V
µA
µA
mA
mA
mA
mA
mA
µA
pF
pF
1
2
2
3
3
Operating current
Standby current
Input capacitance
Output capacitance
I
SB1
I
SB2
C
IN
C
OUT
NOTES:
1. CE/OE = V
IH
2. V
IN
= V
IH
or V
IL
, CE = V
IL
, outputs open
3. V
IN
= (V
CC
– 0.2 V) or 0.2 V, CE = 0.2 V, outputs open
3
LH534A00
CMOS 4M MROM
AC CHARACTERISTICS (V
CC
= 5 V
±10%,
T
A
= –20°C to +70°C)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
NOTE
Read cycle time
Address access time
Chip enable access time
Output enable delay time
Output hold time
CE to output in High-Z
OE to output in High-Z
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CHZ
t
OHZ
120
120
120
60
0
60
ns
ns
ns
ns
ns
ns
1
NOTE:
1. This is the time required for the outputs to become high-impedance.
AC TEST CONDITIONS
PARAMETER
RATING
Input voltage amplitude
Input rise/fall time
Input/output reference level
Output load condition
0.4 to 2.6 V
10 ns
1.5 V
1 TTL + 100 pF
CAUTION
To stabilize the power supply, it is recommended that a high-frequency bypass capacitor be connected between
the V
CC
pin and the GND pin.
t
RC
A
0
- A
18
t
AA
(NOTE)
CE
t
ACE
(NOTE)
OE
t
OE
(NOTE)
t
OHZ
t
OH
t
CHZ
D
0
- D
7
DATA VALID
NOTE:
The output data becomes valid when the last
intervals, t
AA
, t
ACE
, or t
OE
, have concluded.
534A00-3
Figure 3. Timing Diagram
4
CMOS 4M MROM
LH534A00
PAGKAGE DIAGRAM
32TSOP (Type I) (TSOP032-P-0820)
0.30 [0.012]
0.10 [0.004]
32
0.50 [0.020]
TYP.
17
18.60 [0.732]
18.20 [0.717]
20.30 [0.799]
19.70 [0.776]
19.00 [0.748]
1
8.20 [0.323]
7.80 [0.307]
16
0.20 [0.008]
0.10 [0.004]
1.10 [0.043]
0.90 [0.035]
1.20 [0.047] MAX.
0.425 [0.017] 0.20 [0.008]
0.00 [0.000]
0.15 [0.006]
DIMENSIONS IN MM [INCHES]
MAXIMUM LIMIT
MINIMUM LIMIT
32TSOP
32-pin, 8
×
20 mm
2
TSOP (Type I)
ORDERING INFORMATION
LH534A00
Device Type
T
Package
32-pin, 8 x 20 mm
2
TSOP (Type I) (TSOP032-P-0820)
CMOS 4M (512K x 8) Mask-Programmable ROM
Example:
LH534A00T (CMOS 4M (512K x 8) Mask-Programmable ROM, 32-pin, 8 x 20 mm
2
TSOP (Type I))
534A00-4
5
嵌入式系统
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