LH538700A
FEATURES
•
1,048,576 words
×
8 bit organization
•
Access time: 100 ns (MAX.)
•
Power consumption:
Operating: 550 mW (MAX.)
Standby: 550
µW
(MAX.)
•
Static operation
•
TTL compatible I/O
•
Three-state outputs
•
Single +5 V power supply
•
Packages:
32-pin, 600-mil DIP
32-pin, 525-mil SOP
32-pin, 400-mil TSOP (Type II)
DESCRIPTION
The LH538700A is an 8M-bit mask-programmable
ROM organized as 1,048,576
×
8 bits. It is fabricated
using silicon-gate CMOS process technology.
32-PIN DIP
32-PIN SOP
PRELIMINARY
CMOS 8M (1M
×
8) MROM
PIN CONNECTIONS
TOP VIEW
A
19
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A
18
A
17
A
14
A
13
A
8
A
9
A
11
OE
A
10
CE
D
7
D
6
D
5
D
4
D
3
538700A-1
Figure 1. Pin Connections for DIP and
SOP Packages
32-PIN TSOP (Type II)
TOP VIEW
A
19
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A
18
A
17
A
14
A
13
A
8
A
9
A
11
OE
A
10
CE
D
7
D
6
D
5
D
4
D
3
NOTE:
Reverse bend available on request.
538700A-2
Figure 2. Pin Connections for TSOP Package
1
LH538700A
PRELIMINARY
CMOS 8M MROM
A
19
1
A
18
31
A
17
30
A
16
2
A
15
3
A
14
29
A
13
28
A
12
4
A
11
25
A
10
23
A
9
A
8
A
7
A
6
26
27
5
6
ADDRESS BUFFER
A
5
7
A
4
8
A
3
9
A
2
10
A
1
11
A
0
12
ADDRESS DECODER
MEMORY
MATRIX
(1,048,576 x 8)
COLUMN SELECTOR
SENSE AMPLIFIER
CE 22
CE
BUFFER
TIMING
GENERATOR
OUTPUT BUFFER
OE 24
OE
BUFFER
32
16
V
CC
GND
13
D
0
14
D
1
15
D
2
17
D
3
18
D
4
19
D
5
20
D
6
21
D
7
538700A-3
Figure 3. LH538700A Block Diagram
PIN DESCRIPTION
SIGNAL
PIN NAME
SIGNAL
PIN NAME
A
0
– A
19
D
0
– D
7
CE
Address input
Data output
Chip enable input
OE
V
CC
GND
Output enable input
Power supply (+5 V)
Ground
2
CMOS 8M MROM
PRELIMINARY
LH538700A
TRUTH TABLE
CE
OE
DATA OUTPUT
SUPPLY CURRENT
H
L
L
X
H
L
High-Z
High-Z
Output
Standby
Operating
Operating
NOTE:
X = H or L.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
UNIT
Supply voltage
Input voltage
Output voltage
Operating temperature
Storage temperature
V
CC
V
IN
V
OUT
Topr
Tstg
– 0.3 to +7.0
–0.3 to V
CC
+0.3
–0.3 to V
CC
+0.3
0 to +70
– 65 to +150
V
V
V
°C
°C
RECOMMENDED OPERATING CONDI-
TIONS (T
A
= 0°C to +70°C)
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Supply voltage
V
CC
4.5
5.0
5.5
V
DC CHARACTERISTICS (V
CC
= 5 V
±10%,
T
A
= 0°C to +70°C)
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
UNIT
NOTE
Input ‘Low’ voltage
Input ‘High’ voltage
Output ‘Low’ voltage
Output ‘High’ voltage
Input leakage current
Output leakage current
Operating current
Standby current
Input capacitance
Output capacitance
NOTES:
1. CE/OE = V
IH
V
IL
V
IH
V
OL
V
OH
| I
LI
|
| I
LO
|
I
CC1
I
CC2
I
SB1
I
SB2
C
IN
C
OUT
I
OL
= 2.0 mA
I
OH
= – 400
µA
V
IN
= 0 V to V
CC
V
OUT
= 0 V to V
CC
t
RC
= 100 ns
t
RC
= 1
µs
CE = V
IH
CE = V
CC
– 0.2 V
f = 1 MHz
T
A
= 25°C
–0.3
2.2
2.4
0.8
V
CC
+ 0.3
0.4
10
10
100
90
3
100
10
10
V
V
V
V
µA
µA
mA
mA
mA
µA
pF
pF
1
2
2
2. V
IN
= V
IH
or V
IL
, CE = V
IL
, outputs open
3
LH538700A
PRELIMINARY
CMOS 8M MROM
AC CHARACTERISTICS (V
CC
= 5 V
±10%,
T
A
= 0°C to +70°C)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
NOTE
Read cycle time
Address access time
Chip enable access time
Output enable delay time
Output hold time
CE to output in High-Z
OE to output in High-Z
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CHZ
t
OHZ
100
100
100
50
5
40
40
ns
ns
ns
ns
ns
ns
ns
1
1
NOTE:
1. This is the time required for the output to become high-impedance.
AC TEST CONDITIONS
PARAMETER
RATING
Input voltage amplitude
Input rise/fall time
Input/output reference level
Output load condition
0.4 V to 2.6 V
10 ns
1.5 V
1TTL + 100 pF
CAUTION
To stabilize the power supply, it is recommended that
a high-frequency bypass capacitor be connected be-
tween the V
CC
pin and the GND pin.
t
RC
A
0
- A
19
t
AA
(NOTE)
CE
t
ACE
(NOTE)
OE
t
OE
(NOTE)
t
OH
t
OHZ
t
CHZ
D
0
- D
7
DATA VALID
NOTE:
The output data becomes valid when the last
intervals, t
AA
, t
ACE
, or t
OE
, have concluded.
538700A-4
Figure 4. Timing Diagram
4
CMOS 8M MROM
PRELIMINARY
LH538700A
PACKAGE DIAGRAMS
32DIP (DIP032-P-0600)
32
17
DETAIL
13.45 [0.530]
12.95 [0.510]
1
41.30 [1.626]
40.70 [1.602]
16
0.30 [0.012]
0.20 [0.008]
0° TO 15°
4.50 [0.177]
4.00 [0.157]
5.20 [0.205]
5.00 [0.197]
3.50 [0.138]
3.00 [0.118]
2.54 [0.100]
TYP.
0.51 [0.020] MIN.
0.60 [0.024]
0.40 [0.016]
MAXIMUM LIMIT
MINIMUM LIMIT
15.24 [0.600]
TYP.
DIMENSIONS IN MM [INCHES]
32DIP
32-pin, 600-mil DIP
32SOP (SOP032-P-0525)
1.27 [0.050]
TYP.
1.40 [0.055]
17
0.50 [0.020]
0.30 [0.012]
32
11.50 [0.453]
11.10 [0.437]
14.50 [0.571]
13.70 [0.539]
12.50 [0.492]
1
20.80 [0.819]
20.40 [0.803]
16
1.40 [0.055]
0.20 [0.008]
0.10 [0.004]
0.15 [0.006]
1.275 [0.050]
2.90 [0.114]
2.50 [0.098]
0.20 [0.008]
0.00 [0.000]
1.275 [0.050]
MAXIMUM LIMIT
MINIMUM LIMIT
DIMENSIONS IN MM [INCHES]
32SOP
32-pin, 525-mil SOP
5
嵌入式系统
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