The documentation and process conversion measures necessary to
comply with this revision shall be completed by 30 January 2004.
P.O.C. Gregory Cooley, PH 614-692-0515.
E-mail: gregory.cooley@dla.mil.
INCH-POUND
MIL-PRF-19500/495D
30 October 2003
SUPERSEDING
MIL-PRF-19500/495C
10 August 1998
PERFORMANCE SPECIFICATION
SEMICONDUCTOR DEVICE, UNITIZED, DUAL-TRANSISTOR, NPN, SILICON,
TYPES 2N5793, 2N5794, AND 2N5794U, JAN, JANTX, AND JANTXV
This specification is approved for use by all Departments
and Agencies the Department of Defense.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for unitized, dual transistors which contain a
pair of electrically isolated unmatched NPN, silicon transistors in one package. Three levels of product assurance are
provided for each device type as specified in MIL-PRF-19500.
1.2 Physical dimensions. See figures 1 (similar to TO-99) and 2 (surface mount).
* 1.3 Maximum ratings. T
A
= +25°C, unless otherwise specified.
P
T
(1)
T
A
= +25°C
One section
Total device
W
0.5
W
0.6
mA dc
600
V dc
75
V dc
40
V dc
6.0
I
C
V
CBO
V
CEO
V
EBO
R
θJA
One section
°C/W
350
R
θJA
Total device
°C/W
290
°C
-65 to +200
T
J
and T
STG
(1) For T
A
≥
25°C, derate linearly 2.86 mW/°C one section, 3.43 mW/°C total.
C
obo
V
CB
= 10 V dc
I
E
= 0
100 kHz
≤
f
≤
1 MHz
pF
Minimum
Maximum
8.0
h
fe
V
CE
= 20 V dc
I
C
= 20 mA dc
f = 100 MHz
ns
2.0
10.0
45
ns
310
t
on
Switching
t
off
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in
improving this document should be addressed to: Defense Supply Center, Columbus, ATTN: DSCC-VAC,
P.O. Box 3990, Columbus, OH 43216-5000, by using the Standardization Document Improvement Proposal (DD
Form 1426) appearing at the end of this document or by letter.
AMSC N/A
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
FSC 5961
MIL-PRF-19500/495D
1.4 Primary electrical characteristics. T
A
= +25°C, unless otherwise specified.
h
FE1
Limits
V
CE
= 10 V dc
I
C
= 100
µA
dc
Min
2N5793
2N5794
2N5794U
20
35
35
Max
h
FE4
(1)
V
CE
= 10 V dc
I
C
= 150 mA dc
Min
40
100
100
Max
120
300
300
V
CE(sat)1
(1)
I
C
= 150 mA dc
I
B
= 15 mA dc
Max
V dc
0.3
0.3
0.3
V
CE(sat)2
(1)
I
C
= 300 mA dc
I
B
= 30 mA dc
Max
V dc
0.9
0.9
0.9
V
BE(sat)1
(1)
I
C
= 150 mA dc
I
B
= 15 mA dc
Min
V dc
0.6
0.6
0.6
Max
V dc
1.2
1.2
1.2
(1) Pulsed (see 4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3 and 4 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements documents cited in sections 3 and 4 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and
supplement thereto, cited in the solicitation (see 6.2).
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-19500
STANDARD
DEPARTMENT OF DEFENSE
MIL-STD-750
-
Test Methods for Semiconductor Devices.
-
Semiconductor Devices, General Specification for.
(Unless otherwise indicated, copies of the above specifications, standards, and handbooks are available from the
Document Automation and Production Services (DAPS), Building 4D (DPM-DODSSP), 700 Robbins Avenue,
Philadelphia, PA 19111-5094.)
2.3 Order of precedence. In the event of a conflict between the text of this document and the references cited
herein the text of this document take precedence. Nothing in this document, however, shall supersede applicable
laws and regulations unless a specific exemption has been obtained.
2
MIL-PRF-19500/495D
Symbol
CD
CH
HD
LD
LL
LC
LC1
LC2
TL
TW
α
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.305
.335
7.75
8.51
.150
.185
3.81
4.70
.335
.370
8.51
9.40
.016
.021
0.41
0.53
.500
12.70
.200 BSC
5.08 BSC
.100 BSC
2.54 BSC
.100 BSC
2.54 BSC
.029
.045
0.74
1.14
.028
.034
0.71
0.86
45° TP
45° TP
Note
4
3
6
*
*
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Measured from maximum diameter of the product.
4. Leads having maximum diameter .019 inch (.483 mm) measured in gaging plan
.054 inch (1.37 mm) + .001 inch (.025 mm) - .000 inch (.000 mm) below the seating plane of the
product shall be within .007 inch (.178 mm) of their true position relative to a maximum width tab.
5. The product may be measured by direct methods or by gauge.
6. Tab centerline.
*
7. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
FIGURE 1. Physical dimensions (2N5793 and 2N5794) (similiar to TO-99).
3
MIL-PRF-19500/495D
Symbol
BL
BL
2
BW
BW
2
CH
L
3
LH
Dimensions
“ Inches
Millimeters
Min
Max
Min
Max
.240
.250
6.10
6.35
.250
6.35
.165
.175
4.19
4.45
.175
4.45
.058
.100
1.47
2.54
.003
.007
0.08
0.18
.026
.039
0.66
0.99
Symbol
LL
1
LL
2
LS
1
LS
2
LW
LW
2
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.060
.070
1.52
1.78
.082
.098
2.08
2.49
.095
.105
1.14
1.40
.045
.055
2.41
2.67
.022
.028
0.56
0.71
.006
.022
0.15
0.56
*
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension "CH" controls the overall package thickness.
4. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option from that shown on
the drawing.
5. Dimensions "LW
2
" minimum and "L
3
" minimum and the appropriate castellation length define an
unobstructed three-dimensional space traversing all of the ceramic layers in which a castellation was
designed. (Castellations are required on bottom two layers, optional on top ceramic layer.) Dimension
"LW
2
" maximum and "L
3
" maximum define the maximum width and depth of the castellation at any point on
its surface. Measurement of these dimensions may be made prior to solder dipping.
6. Lead 4 = no connection.
7. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
FIGURE 2. Physical dimensions, 2N5794U.
4
MIL-PRF-19500/495D
3. REQUIREMENTS
3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)
before contract award (see 4.2 and 6.3).
3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as
specified in MIL-PRF-19500.
3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in
MIL-PRF-19500, and figures 1 (similar to TO-99), and 2 (surface mount) herein.
3.4.1 Lead finish. Lead finish shall be solderable as defined in MIL-PRF-19500, MIL-STD-750, and herein.
Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).
3.5 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance
characteristics are as specified in 1.3, 1.4, and table I.
3.6 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table I,
subgroup 2.
3.7 Marking. Marking shall be in accordance with MIL-PRF-19500.
* 3.8 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and
shall be free from other defects that will affect life, serviceability, or appearance.
4. VERIFICATION
* 4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:
a. Qualification inspection (see 4.2).
b. Screening (see 4.3).
c. Conformance inspection (see 4.4 and table I and II).
4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified
herein.
* 4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In
case qualification was awarded to a prior revision of the associated specification that did not request the performance
of table II tests, the tests specified in table II herein shall be performed by the first inspection lot of this revision to
maintain qualification.
5
FPGA/CPLD
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