CD74HCT73 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset
参数名称 | 属性值 |
Approx. price(US$) | 0.24 | 1ku |
Rating | Catalog |
IOL(Max)(mA) | 6 |
Voltage(Nom)(V) | 5 |
tpd @ nom Voltage(Max)(ns) | 48 |
IOH(Max)(mA) | -6 |
ICC @ nom voltage(Max)(mA) | 0.04 |
F @ nom voltage(Max)(Mhz) | 25 |
VCC(Max)(V) | 5.5 |
Technology Family | HCT |
Schmitt trigger | No |
VCC(Min)(V) | 4.5 |
Package Group | PDIP|14,SOIC|14 |
Bits(#) | 2 |
CD74HCT73 | FP-8999LF-00-2180-D | CD54HC73F | CD54HC73F3A | CD54HC73 | CD74HC73 | |
---|---|---|---|---|---|---|
描述 | CD74HCT73 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset | Array/Network Resistor, Isolated, Tantalum Nitride/nickel Chrome, 0.05W, 218ohm, 50V, 0.5% +/-Tol, -300,300ppm/Cel, 3925, | High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125 | High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125 | CD54HC73 High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset | CD74HC73 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset |
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