Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
salesaddresses@nexperia.com).
Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
D2
PA
K
BUK9611-55A
N-channel TrenchMOS logic level FET
Rev. 2 — 7 February 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V and 24 V loads
Automotive and general purpose
power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
Quick reference data
Parameter
drain-source
voltage
drain current
total power
dissipation
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
V
GS
= 5 V; T
mb
= 25 °C;
see
Figure 1;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Min
-
-
-
Typ
-
-
-
Max Unit
55
75
166
V
A
W
NXP Semiconductors
BUK9611-55A
N-channel TrenchMOS logic level FET
Quick reference data
…continued
Parameter
drain-source
on-state
resistance
Conditions
V
GS
= 4.5 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 11;
see
Figure 12
Min
-
-
-
Typ
-
8
9
Max Unit
12
10
11
mΩ
mΩ
mΩ
Table 1.
Symbol
R
DSon
Static characteristics
Avalanche ruggedness
E
DS(AL)S
non-repetitive
I
D
= 75 A; V
sup
≤
55 V;
drain-source
R
GS
= 50
Ω;
V
GS
= 5 V;
avalanche energy T
j(init)
= 25 °C; unclamped
-
-
330
mJ
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT404 (D2PAK)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9611-55A
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
Type number
BUK9611-55A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 7 February 2011
2 of 13
NXP Semiconductors
BUK9611-55A
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 100 °C; V
GS
= 5 V; see
Figure 1
T
mb
= 25 °C; V
GS
= 5 V; see
Figure 1;
see
Figure 3
I
DM
P
tot
T
stg
T
j
V
GSM
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
peak gate-source voltage
source current
peak source current
non-repetitive drain-source
avalanche energy
pulsed; t
p
≤
50 µs
T
mb
= 25 °C
pulsed; t
p
≤
10 µs; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
55 V; R
GS
= 50
Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
T
mb
= 25 °C; pulsed; see
Figure 3
T
mb
= 25 °C; see
Figure 2
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-10
-
-
-
-
-55
-55
-15
-
-
-
Max
55
55
10
61
75
266
166
175
175
15
75
266
330
Unit
V
V
V
A
A
A
W
°C
°C
V
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
120
I
der
(%)
80
03aa24
120
P
der
(%)
80
03na19
40
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
BUK9611-55A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 7 February 2011
3 of 13
NXP Semiconductors
BUK9611-55A
N-channel TrenchMOS logic level FET
10
3
I
D
(A)
10
2
03nd78
R
DSon
= V
DS
/ I
D
t
p
= 10
μs
100
μs
10
P
δ
=
t
p
T
D.C.
1 ms
10 ms
t
p
T
t
100 ms
1
1
10
V
DS
(V)
10
2
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to mounting base
thermal resistance from
junction to ambient
Conditions
see
Figure 4
mounted on a printed-circuit
board; minimum footprint
Min
-
-
Typ
-
50
Max
0.9
-
Unit
K/W
K/W
1
Z
th(j-mb)
(K/W)
10
−1
δ
= 0.5
0.2
0.1
0.05
0.02
10
−2
Single Shot
t
p
P
03nd79
δ
=
t
p
T
t
T
10
−3
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9611-55A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 7 February 2011
4 of 13
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
