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IDT70V7399S200BCG8

产品描述Dual-Port SRAM, 128KX18, 10ns, PBGA256, BGA-256
产品类别存储    存储   
文件大小488KB,共22页
制造商IDT (Integrated Device Technology)
标准
下载文档 详细参数 选型对比 全文预览

IDT70V7399S200BCG8概述

Dual-Port SRAM, 128KX18, 10ns, PBGA256, BGA-256

IDT70V7399S200BCG8规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码BGA
包装说明LBGA,
针数256
Reach Compliance Codecompliant
ECCN代码3A991.B.2.A
最长访问时间10 ns
其他特性FLOW-THROUGH OR PIPELINED ARCHITECTURE
JESD-30 代码S-PBGA-B256
JESD-609代码e1
长度17 mm
内存密度2359296 bit
内存集成电路类型DUAL-PORT SRAM
内存宽度18
湿度敏感等级3
功能数量1
端子数量256
字数131072 words
字数代码128000
工作模式SYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织128KX18
封装主体材料PLASTIC/EPOXY
封装代码LBGA
封装形状SQUARE
封装形式GRID ARRAY, LOW PROFILE
并行/串行PARALLEL
峰值回流温度(摄氏度)260
认证状态Not Qualified
座面最大高度1.5 mm
最大供电电压 (Vsup)3.45 V
最小供电电压 (Vsup)3.15 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Silver/Copper (Sn/Ag/Cu)
端子形式BALL
端子节距1 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间30
宽度17 mm
Base Number Matches1

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HIGH-SPEED 3.3V 128K x 18
SYNCHRONOUS
BANK-SWITCHABLE
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Features:
x
IDT70V7399S
x
x
x
x
x
x
128K x 18 Synchronous Bank-Switchable Dual-ported
SRAM Architecture
64 independent 2K x 18 banks
– 2 megabits of memory on chip
Bank access controlled via bank address pins
High-speed data access
– Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/
4.2ns (133MHz) (max.)
– Industrial: 3.6 (166MHz)/4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 5ns cycle time, 200MHz operation (14Gbps bandwidth)
– Fast 3.4ns clock to data out
– 1.5ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 200MHz
x
x
x
x
x
x
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
Separate byte controls for multiplexed bus and bus
matching compatibility
LVTTL- compatible, 3.3V (±150mV) power supply
for core
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
Available in a 144-pin Thin Quad Flatpack (TQFP),
208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball
Grid Array (BGA)
Supports JTAG features compliant with IEEE 1149.1
– Due to limited pin count, JTAG is not supported on the
144-pin TQFP package.
Functional Block Diagram
PL/FT
L
OPT
L
CLK
L
ADS
L
CNTEN
L
REPEAT
L
R/W
L
CE
0L
CE
1L
UB
L
LB
L
OE
L
PL/FT
R
OPT
R
CLK
R
ADS
R
CNTEN
R
REPEAT
R
R/W
R
CE
0R
CE
1R
UB
R
LB
R
OE
R
CONTROL
LOGIC
MUX
2Kx18
MEMORY
ARRAY
(BANK 0)
MUX
CONTROL
LOGIC
I/O
0L-17L
I/O
CONTROL
MUX
2Kx18
MEMORY
ARRAY
(BANK 1)
MUX
I/O
CONTROL
I/O
0R-17R
A
10L
A
0L
BA
5L
BA
4L
BA
3L
BA
2L
BA
1L
BA
0L
ADDRESS
DECODE
ADDRESS
DECODE
A
10R
A
0R
BA
5R
BA
4R
BA
3R
BA
2R
BA
1R
BA
0R
BANK
DECODE
MUX
2Kx18
MEMORY
ARRAY
(BANK 63)
BANK
DECODE
NOTE:
1. The Bank-Switchable dual-port uses a true SRAM
core instead of the traditional dual-port SRAM core.
As a result, it has unique operating characteristics.
Please refer to the functional description on page 19
for details.
MUX
,
TDI
TDO
JTAG
TMS
TCK
TRST
5630 drw 01
DECEMBER 2002
1
DSC 5630/6
©2002 Integrated Device Technology, Inc.

IDT70V7399S200BCG8相似产品对比

IDT70V7399S200BCG8 IDT70V7399S166BCG8 IDT70V7399S133BCGI8 IDT70V7399S133BCG8 IDT70V7399S166BCGI8 IDT70V7399S133BFG8 IDT70V7399S133BFGI8 IDT70V7399S166BFG8
描述 Dual-Port SRAM, 128KX18, 10ns, PBGA256, BGA-256 Dual-Port SRAM, 128KX18, 12ns, PBGA256, BGA-256 Dual-Port SRAM, 128KX18, 15ns, PBGA256, BGA-256 Dual-Port SRAM, 128KX18, 15ns, PBGA256, BGA-256 Dual-Port SRAM, 128KX18, 12ns, PBGA256, BGA-256 Dual-Port SRAM, 128KX18, 15ns, PBGA208, FBGA-208 Dual-Port SRAM, 128KX18, 15ns, PBGA208, FBGA-208 Dual-Port SRAM, 128KX18, 12ns, PBGA208, FBGA-208
是否无铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅
是否Rohs认证 符合 符合 符合 符合 符合 符合 符合 符合
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 BGA BGA BGA BGA BGA BGA BGA BGA
包装说明 LBGA, LBGA, LBGA, LBGA, LBGA, TFBGA, TFBGA, TFBGA,
针数 256 256 256 256 256 208 208 208
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 10 ns 12 ns 15 ns 15 ns 12 ns 15 ns 15 ns 12 ns
其他特性 FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE
JESD-30 代码 S-PBGA-B256 S-PBGA-B256 S-PBGA-B256 S-PBGA-B256 S-PBGA-B256 S-PBGA-B208 S-PBGA-B208 S-PBGA-B208
JESD-609代码 e1 e1 e1 e1 e1 e1 e1 e1
长度 17 mm 17 mm 17 mm 17 mm 17 mm 15 mm 15 mm 15 mm
内存密度 2359296 bit 2359296 bit 2359296 bit 2359296 bit 2359296 bit 2359296 bit 2359296 bit 2359296 bit
内存集成电路类型 DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM
内存宽度 18 18 18 18 18 18 18 18
湿度敏感等级 3 3 3 3 3 3 3 3
功能数量 1 1 1 1 1 1 1 1
端子数量 256 256 256 256 256 208 208 208
字数 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words
字数代码 128000 128000 128000 128000 128000 128000 128000 128000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 70 °C 85 °C 70 °C 85 °C 70 °C 85 °C 70 °C
组织 128KX18 128KX18 128KX18 128KX18 128KX18 128KX18 128KX18 128KX18
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LBGA LBGA LBGA LBGA LBGA TFBGA TFBGA TFBGA
封装形状 SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
封装形式 GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) 260 260 260 260 260 260 260 260
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.5 mm 1.5 mm 1.5 mm 1.5 mm 1.5 mm 1.2 mm 1.2 mm 1.2 mm
最大供电电压 (Vsup) 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V
最小供电电压 (Vsup) 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL
端子面层 Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
端子形式 BALL BALL BALL BALL BALL BALL BALL BALL
端子节距 1 mm 1 mm 1 mm 1 mm 1 mm 0.8 mm 0.8 mm 0.8 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
处于峰值回流温度下的最长时间 30 30 30 30 30 30 30 30
宽度 17 mm 17 mm 17 mm 17 mm 17 mm 15 mm 15 mm 15 mm
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