HB28D096C8C/HB28D032C8C
CompactFlash™
96 MByte/32 MByte
ADE-203-1348A (Z)
Rev. 1.0
May. 31, 2002
Description
HB28D096C8C, HB28D032C8C are CompactFlash™. This card complies with CompactFlash™
specification, and is suitable for the usage of data storage memory medium for PC or any other electric
equipment and digital still camera. This card is equipped with 0.18
µm
CMOS 256 Mega bit Flash memory.
This card is suitable for ISA (Industry Standard Architecture) bus interface standard, and read/write unit is 1
sector (512 bytes) sequential access. By using this card it is possible to operate good performance for the
system which have CompactFlash
TM
slots.
Note:
CompactFlash™ is a trademark of SanDisk Corporation and is licensed royalty-free to the CFA which
in turn will license it royalty-free to CFA members.
*CFA: CompactFlash™ Association.
Features
•
CompactFlash™ specification standard
50 pin two pieces connector and Type I (3.3 mm)
•
3.3V / 5V single power supply operation
•
Card density is 96 Mega bytes maximum
This card is equipped with 0.18
µm
CMOS 256 Mega bit Flash memory
HB28D096/032C8C
•
3 variations of mode access
Memory card mode
I/O card mode
True IDE mode
•
Internal self-diagnostic program operates at V
CC
power on
•
High reliability based on internal ECC (Error Correcting Code) function
•
Auto sleep mode
•
Data write is 100,000 cycles/block.*
1
Note: 1. One block consists of four sectors (512 byte
×
4).
Card Line Up*
1
Type No.
Card density Capacity*
4
Total sectors/ Sectors/
card*
3
track*
2
187,392
62,592
32
32
Number of
head
8
32
Number of
cylinder
732
489
HB28D096C8C 96 MB
HB28D032C8C 32 MB
Notes: 1.
2.
3.
4.
95,944,704 byte
32,047,104 byte
These data are written in ID.
Total tracks = number of head
×
number of cylinder.
Total sectors/card = sectors/track
×
number of head
×
number of cylinder.
It is the logical address capacity including the area which is used for file system.
2
HB28D096/032C8C
Card Pin Explanation
Signal name
Direction Pin No.
Description
A10 to A0
I
(PC Card Memory mode)
A10 to A0
(PC Card I/O mode)
A2 to A0
(True IDE mode)
BVD1
I/O
(PC Card Memory mode)
-STSCHG
(PC Card I/O mode)
-PDIAG
(True IDE mode)
BVD2
I/O
(PC Card Memory mode)
-SPKR
(PC Card I/O mode)
-DASP
(True IDE mode)
-CD1, -CD2
O
(PC Card Memory mode)
-CD1, -CD2
(PC Card I/O mode)
-CD1, -CD2
(True IDE mode)
-CE1, -CE2
I
(PC Card Memory mode)
Card Enable
-CE1, -CE2
(PC Card I/O mode)
Card Enable
-CE1, -CE2
(True IDE mode)
-CE2 is used for select the Alternate Status Register
and the Device Control Register while -CE1 is the chip
select for the other task file registers.
7, 32
-CE1 and -CE2 are low active card select signals.
Byte/Word/Odd byte mode are defined by combination
of -CE1, -CE2 and A0.
26, 25
45
18, 19, 20
46
Address bus is A10 to A0. Only A2 to A0 are used,
A10 to A3 should be grounded by the host.
BVD1 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-STSCHG is used for changing the status of
Configuration and status register in attribute area.
-PDIAG is the Pass Diagnostic signal in Master/Slave
handshake protocol.
BVD2 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-SPKR outputs speaker signals. This output line is
constantly driven to a high state since this product
does not support the audio function.
-DASP is the Disk Active/Slave Present signal in the
Master/Slave handshake protocol.
-CD1 and -CD2 are the card detection signals. -CD1
and -CD2 are connected to ground in this card, so
host can detect that the card is inserted or not.
8, 10, 11, 12, 14, Address bus is A10 to A0. A10 is MSB and A0 is
15, 16, 17, 18,
LSB.
19, 20
5
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