H8S/2237 Series
H8S/2227 Series
Overview
ADE-
Rev. 0.2
Nov. 13, 1997
Hitachi, Ltd.
MC-Setsu
Notice
When using this document, keep the following in mind:
1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole
or part of this document without Hitachi’s permission.
3. Hitachi will not be held responsible for any damage to the user that may result from accidents
or any other reasons during operation of the user’s unit according to this document.
4. Circuitry and other examples described herein are meant merely to indicate the characteristics
and performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for
any intellectual property claims or other problems that may result from applications based on
the examples described herein.
5. No license is granted by implication or otherwise under any patents or other rights of any third
party or Hitachi, Ltd.
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales
company. Such use includes, but is not limited to, use in life support systems. Buyers of
Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to
use the products in MEDICAL APPLICATIONS.
Preface
Hitachi’s H8S family of single-chip microcomputers comprises a number of new series offering
the high performance and low power consumption of the existing H8 Series, which is widely used
for machine control, etc., together with significantly greater ease of use.
The H8S/2000 Series features CPU object-level compatibility with the H8/300H Series, H8/300
Series, and H8/300L Series within the H8 Series.
Series
H8S/2000
H8/300H
H8/300
H8/300L
Features
Upward-compatible with the H8/300H Series and H8/300 Series; twice the
performance at the same frequency
16-Mbyte linear address space; upward-compatible with the H8/300 Series; concise
instruction set; powerful word-size and longword-size arithmetic instructions
64-kbyte address space; general register system; concise instruction set; powerful
bit manipulation instructions
Same CPU as the H8/300 Series; consumer application oriented supporting
modules; low voltage, low power consumption
This document gives an overview of the new H8S/2000 Series products, which is suitable for
single chip application in the H8S Series.
Intended Readership:
This Overview is intended for readers who have a basic understanding of
microcomputers, and are looking for information on the features and functions of the H8S/2237,
and H8S/2227 Series. Readers undertaking system design using these products, or requiring more
detailed information on their use, should refer to the relevant Hardware Manuals and the
H8S/2600 and H8S/2000 Series Programming Manual.
Related Documents
Contents
H8S/2237 Series and
H8S/2227 Series hardware
H8S/2000 Series execution
instructions
Title
H8S/2237 Series and H8S/2227
Series Hardware Manual
H8S/2600 Series and H8S/2000
Series Programming Manual
Document No.
TBD (Scheduled publication:
5/98)
ADE-602-083A
The product specifications in this Overview are subject to change without notice. The relevant
Hardware Manual must be used when undertaking product design.
On-Chip Supporting Modules
Series
Product names
Bus controller (BSC)
Data transfer controller (DTC)
16-bit timer pulse unit (TPU)
8-bit timer (TMR)
Watchdog timer (WDT)
Serial communication interface (SCI)
A/D converter
D/A converter
PC break controller
H8S/2237 Series
H8S/2237, 2235, 2233
Available (16-bit)
Available
×6
×2
×2
×4
×8
×2
×2
H8S/2227 Series
H8S/2227, 2225, 2223
Available (16-bit)
Available
×3
×2
×2
×3
×8
—
×2
Contents
Section 1
1.1
1.2
Features of H8S/2237 Series and H8S/2227 Series
.............................
1.3
Features of H8S/2237 Series and H8S/2227 Series ..........................................................
1.1.1 High-performance H8S/2000 CPU ......................................................................
Pin Arrangement and Functions ........................................................................................
1.2.1 H8S/2237 Series Pin Arrangement ......................................................................
1.2.2 H8S/2227 Series Pin Arrangement ......................................................................
Internal Block Diagram .....................................................................................................
1
1
1
5
5
7
11
Section 2
2.1
CPU
..................................................................................................................... 13
13
13
16
19
22
26
38
42
44
46
51
53
Overview............................................................................................................................
2.1.1 Features ................................................................................................................
2.2 Register Configuration ......................................................................................................
2.3 Data Formats......................................................................................................................
2.4 Addressing Modes .............................................................................................................
2.5 Instruction Set....................................................................................................................
2.6 Basic Timing......................................................................................................................
2.7 Processing States ...............................................................................................................
2.8 Exception Handling ...........................................................................................................
2.9 Interrupts............................................................................................................................
2.10 MCU Operating Modes .....................................................................................................
2.11 Address Maps ....................................................................................................................
Section 3
3.1
3.2
Supporting Modules
....................................................................................... 56
56
56
58
58
60
61
61
66
66
68
78
78
82
83
84
85
i
3.3
3.4
PC Break Controller (PBC) ...............................................................................................
3.1.1 Features ................................................................................................................
Bus Controller (BSC) ........................................................................................................
3.2.1 Features ................................................................................................................
3.2.2 Area Partitioning ..................................................................................................
3.2.3 Bus Specifications ................................................................................................
3.2.4 Memory Interfaces................................................................................................
Data Transfer Controller (DTC)........................................................................................
3.3.1 Features ................................................................................................................
3.3.2 Data Transfer Operation .......................................................................................
16-Bit Timer Pulse Unit (TPU) .........................................................................................
3.4.1 Features ................................................................................................................
3.4.2 Interrupt Sources and Data Transfer Controller (DTC) Activation......................
3.4.3 Operation ..............................................................................................................
3.4.4 PWM Modes ........................................................................................................
3.4.5 Input Capture Operation .......................................................................................
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