®
74LCX86
LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE
WITH 5V TOLERANT INPUTS
s
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED:
t
PD
= 6.5 ns (MAX.) at V
CC
= 3V
POWER-DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN)
PCI BUS LEVELS GUARANTEED AT 24mA
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.7V to 3.6V (1.5V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 86
LATCH-UP PERFORMANCE EXCEEDS 500mA
ESD PERFORMANCE:
HBM >2000V; MM > 200V
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74LCX86M
74LCX86T
wiring C
2
MOS technology. It is ideal for low
power and high speed 3.3V applications; it can
be interfaced to 5V signal environment for inputs.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The LCX86 is a low voltage CMOS QUAD
EXCLUSIVE OR GATE fabricated with
sub-micron silicon gate and double-layer metal
PIN CONNECTION AND IEC LOGIC SYMBOLS
February 1999
1/8
74LCX86
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
NAME AND FUNCT ION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
L
H
H
B
L
H
L
H
Y
L
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage (V
CC
=0V)
DC Output Voltage (High or Low State) (note1)
DC Input Diode Current
DC Output Diode Current (note2)
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to + 7.0
-0.5 to + 7.0
-0.5 to + 7.0
-0.5 to V
CC
+ 0.5
- 50
±
50
±
50
±
100
±
100
-65 to +150
300
Unit
V
V
V
V
mA
mA
mA
mA
mA
o
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
1) I
O
absolute maximum rating must be observed
2) V
O
< GND, V
O
> V
CC
2/8
74LCX86
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
V
O
I
OH
, I
OL
I
OH
, I
OL
T
op
dt/dv
Input Voltage
Output Voltage (V
CC
=0V)
Output Voltage (High or Low State)
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
High or Low Level Output Current (V
CC
= 2.7 to 3.0V)
Operating Temperature:
Input Transition Rise or Fall Rate (V
CC
= 3.0V) (note 2)
Parameter
Supply Voltage (note 1)
Value
2.0 to 3.6
0 to 5.5
0 to 5.5
0 to V
CC
±
24
±
12
-40 to +85
0 to 10
Unit
V
V
V
V
mA
mA
o
C
ns/V
1) Truth Table guaranteed: 1.5V to3.6V
2) V
IN
from0.8V to 2.0V
DC SPECIFICATIONS
Symb ol
Parameter
V
CC
(V)
V
IH
V
IL
V
OH
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
2.7 to 3.6
2.7 to 3.6
2.7
3.0
V
OL
Low Level Output Voltage
2.7 to 3.6
2.7
3.0
3.0
I
I
I
off
I
CC
Input Leakage Current
Power Off Leakage Current
Quiescent Supply Current
2.7 to 3.6
0
2.7 to 3.6
V
I
=
V
I H
or
V
IL
Test Co nditi ons
Value
-40 to 85 C
Min.
2.0
0.8
I
O
=-100
µ
A V
CC
-0.2
I
O
=-12 mA
I
O
=-18 mA
I
O
=-24 mA
V
I
=
V
I H
or
V
IL
I
O
=100
µA
I
O
=12 mA
I
O
=16 mA
I
O
=24 mA
V
I
= 0 to 5.5 V
V
I
or V
O
= 5.5V
V
I
= V
CC
or GND
V
I
or V
O
=
3.6 to 5.5V
∆I
CC
ICC incr. per input
2.7 to 3.6
V
IH
= V
CC
-0.6V
2.2
2.4
2.2
0.2
0.4
0.4
0.55
±5
100
10
±
10
500
µA
µA
µ
A
µA
V
V
Max.
V
V
o
Un it
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol
Parameter
V
CC
(V)
V
OLP
V
OLV
Dynamic Low Voltage Quiet Output
(note 1)
3.3
C
L
= 50 pF
V
IL
= 0 V
V
IH
= 3.3V
Test Con dition s
Min .
Value
T
A
= 25 C
T yp.
0.8
-0.8
V
Max.
o
Un it
1) Number ofoutputs defined as ”n”. Measured with”n-1” outputs switching from HIGH to LOW or LOW t o HIGH. The remaining output is measured in
the LOW state.
3/8
74LCX86
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
= 2.5 ns)
Symb ol
Parameter
V
CC
(V)
t
PLH
t
PHL
t
OSLH
t
OSHL
Propagation Delay Time
Output to Output Skew Time (note 1, 2)
2.7
3.0 to 3.6
3.0 to 3.6
Test Con dition
Waveform
Value
-40 to 85
o
C
Min. Max.
6.0
1.0
6.5
1.0
Un it
1
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the
same direction, either HIGH or LOW (t
OSLH
= |t
PLHm
- t
PLHn
|, t
OSHL
= |t
PHLm
- t
pHLn
|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
V
CC
(V)
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance (note 1)
3.3
3.3
V
IN
= 0 to V
CC
f
IN
= 10MHz
V
IN
= 0 or V
CC
Test Co nditi ons
Min.
Valu e
T
A
= 25 C
T yp.
6
43
Max.
pF
pF
o
Un it
1) C
PD
isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. Average
operting current can be obtained by the following equation. I
CC
(opr) = C
PD
•
V
CC
•
f
IN
+ I
CC
/4 (per gate)
4/8
74LCX86
TEST CIRCUIT
C
L
= 50 pF or equivalent (includes jigand probe capacitance)
R
L
= 500Ω or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS
(f=1MHz; 50% duty cycle)
5/8
stm32/stm8
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