D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
UC1543, UC1544
,
UC2543, UC2544
UC3543, UC3544
www.ti.com
SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007
Power Supply Supervisory Circuit
FEATURES
•
•
•
•
•
•
•
Includes Over-Voltage, Under-Voltage, and
Current Sensing Circuits
Internal 1% Accurate Reference
Programmable Time Delays
SCR “Crowbar” Drive of 300 mA
Remote Activation Capability
Optional Over-Voltage Latch
Uncommitted Comparator Inputs for Low
Voltage Sensing (UC1544 Series Only)
Both over- and under-voltage sensing circuits can be
externally programmed for minimum time duration of
fault before triggering. All functions contain open
collector outputs which can be used independently or
wire-or’ed together, and although the SCR trigger is
directly connected only to the over-voltage sensing
circuit, it may be optionally activated by any of the
other outputs, or from an external signal. The O.V.
circuit also includes an optional latch and external
reset capability.
The UC1544/2544/3544 devices have the added
versatility of completely uncommitted inputs to the
voltage sensing comparators so that levels less than
2.5 V may be monitored by dividing down the internal
reference voltage. The current sense circuit may be
used with external compensation as a linear amplifier
or as a highgain comparator. Although nominally set
for zero input offset, a fixed threshold may be added
with an external resistor. Instead of current limiting,
this circuit may also be used as an additional voltage
monitor.
The reference generator circuit is internally trimmed
to eliminate the need for external potentiometers and
the entire circuit may be powered directly from either
the output being monitored or from a separate bias
voltage.
DESCRIPTION
The monolithic integrated circuits contain all the
functions necessary to monitor and control the output
of a sophisticated power supply system.
Over-voltage (O.V.) sensing with provision to trigger
an external SCR “crowbar” shutdown; an
undervoltage (U.V.) circuit which can be used to
monitor either the output or to sample the input line
voltage; and a third op amp/comparator usable for
current sensing (C.L.) are all included in this device,
together with an independent, accurate reference
generator.
BLOCK DIAGRAM
NOTE:
For each terminal, first number refers to 1543 series, second to 1544 series.
*On 1543 series, this function is internally connected to VREF.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2007, Texas Instruments Incorporated
UC1543, UC1544
,
UC2543, UC2544
UC3543, UC3544
SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007
www.ti.com
Connection Diagrams
DIL-16, SOIC-16 (TOP VIEW)
J or N, DW Package
(Also W Package for the UC1543 Only)
SCR Trigger
Remote Activate
Reset
O.V. Indicate
O.V. Delay
O.V. Input
U.V. Input
U.V. Delay
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
UC 1543
UC 2543
UC 3543
DIL-18, SOIC-18 (TOP VIEW)
J or N, DW Package
SCR Trigger
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
UC 1544
UC 2544
UC 3544
V
IN
V
REF
Ground
C.L. Output
Offset/Comp
C.L. N.I. Input
C.L. INV. Input
U.V. Indicate
U.V. Delay
V
IN
V
REF
Ground
C.L. Output
Offset/Comp
C.L. N.I. Input
C.L. INV. Input
U.V. Indicate
Remote Activate
Reset
O.V. Indicate
O.V. Delay
O.V. N.I. Input
O.V. Inv. Input
U.V. N.I. Input
U.V. Inv. Input
PLCC-20, LCC-20
(TOP VIEW)
Q or L Package
PACKAGE PIN FUNCTION
FUNCTION
PIN
N/C
SCR Trigger
Remote Activate
Reset
O.V. Indicate
N/C
O.V. Delay
O.V. Input
N/C
N/C
U.V. Input
U.V. Delay
U.V. Indicate
C.L. INV. Input
C.L. N.I. Input
Offset/Comp
C.L. Output
Ground
V
REF
V
IN
1
2
3
4
5
6
7
8
PLCC-20, LCC-20
(TOP VIEW)
Q or L Package
PACKAGE PIN FUNCTION
FUNCTION
PIN
N/C
SCR Trigger
Remote Activate
Reset
O.V. Indicate
N/C
O.V. Delay
O.V. N.I. Input
O.V. INV. Input
U.V. N.I. Input
U.V. INV. Input
U.V. Delay
U.V. Indicate
C.L. INV. Input
C.L. N.I. Input
Offset/Comp
C.L. Output
Ground
V
REF
V
IN
1
2
3
4
5
6
7
8
3
4
5
6
7
8
9
2
1
20
19
18
17
16
15
14
3
4
5
6
7
8
9
2
1
20
19
18
17
16
15
14
9
10
11
12
13
14
15
16
17
18
19
20
9
10
11
12
13
14
15
16
17
18
19
20
10
11
12
13
10
11
12
13
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
V
IN
Input supply voltage
Sense inputs, voltage range
SCR trigger current
(2)
UNIT
V
mA
V
mA
mW
40
0 to VIN
-600
40
50
1000
-55 to 125
-25 to 85
0 to 70
-65 to 150
UC1543, UC1544
Indicator output voltage
Indicator output sink current
Power dissipation (package limitation)
T
J
T
stg
(1)
(2)
Operating temperature range
Storage temperature range
Currents are positive-into, negative-out of the specified terminal.
At higher input voltages, a dissipation limiting resistor, RG, is required.
UC2543, UC2544
UC3543, UC3544
°C
2
Submit Documentation Feedback
www.ti.com
UC1543, UC1544
,
UC2543, UC2544
UC3543, UC3544
SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for T
A
= -55°C to 125°C for theUC1543 and UC1544; -25°C to 85°C for
the UC2543 and UC2544; and 0°C to 70°C for the UC3543 and UC3544. Electrical tests are performed with V
IN
= 10 V and
2-kΩ pull-up resistors on all indicator outputs. All electrical specifications for the UC1544, UC2544, and UC3544 devices are
tested with the inverting over-voltage input and the non-inverting under-voltage input externallyconnected to the 2.5 V
reference. T
A
= T
J
.
PARAMETER
TEST CONDITIONS
T
J
= 25°C to T
MAX
T
MIN
to T
MAX
V
IN
= 40 V, output open,
T
J
= 25°C
T
MIN
≤
T
J
≤
T
MAX
T
J
= 25°C
Over temperature range
V
IN
= 5 to 30 V
I
REF
= 0 to 10 mA
V
REF
= 0
-10
2.48
2.45
1
1
-20
50
V
IN
= 5V, RG = 0, VO = 0
V
IN
= 15 V, I
O
= -100 mA
V
IN
= 40 V
R/A Pin = GND
R/A Pin Open
Reset = GND, R/A = GND
Reset open, R/A = GND
R
L
= 50, T
J
= 25°C, C
D
= 0
R
L
= 50, T
J
= 25°C, C
D
= 0
R
L
= 50, T
J
= 25°C, C
D
= 0
T
J
= 25°C
Over temperature range
2.45
2.40
25
Sense input = 0 V
-0.3
0.2
6
V
O
= 0
I
L
= 10 mA
V
IND
= 40 V
Input over drive = 200 mV,
T
J
= 25°C, C
D
= 0
Input over drive = 200 mV,
T
J
= 25°C, C
D
= 1
µF
-200
-250
0.2
0.01
400
10
-1.0
0.5
7
-300
0.5
1.0
-200
-100
12
-300
13
0
-0.4
2
-0.4
2
400
300
500
2.50
2.55
2.60
2.40
2.35
25
-0.3
0.2
6
-250
0.2
0.01
400
10
-1.0
0.5
7
-300
0.5
1.0
0.1
-0.8
6
-0.8
6
-600
-100
12
2.5
UC1543/UC1544/UC2543/
UC2544
MIN
V
IN
Input voltage range
4.5
4.7
7
TYP
MAX
40
40
10
15
2.52
2.55
5
10
-40
-12
2.45
2.40
1
1
-20
50
-300
13
0
-0.4
2
-0.4
2
400
300
500
2.50
2.60
2.65
V
mV
µA
V
µA
V
µA
ns
ms
0.1
-0.8
6
-0.8
6
-600
2.50
UC3543/UC3544
MIN
4.5
4.7
7
TYP
MAX
40
40
10
15
2.55
2.60
5
10
-40
V
UNIT
I
CC
Supply current
mA
Reference Section
V
OUT
Output voltage
Line regulation
Load regulation
Short circuit current
Temperature stability
SCR Trigger Section
Peak output current
Peak output voltage
Output OFF voltage
Remote activate current
Remote activate voltage
Reset current
Reset voltage
Output current rise time
Prop. delay from R/A
Prop. delay from O/V input
Comparator Section
Input threshold (Input
voltage rising on O.V. and
falling on U.V.)
Input hysteresis
Input bias current
Delay saturation
Delay high level
Delay charging current
Indicate saturation
Indicate leakage
mA
V
mA
V
mA
V
mA/µs
ns
V
mV
mA
ppm/°C
Propagation delay
Submit Documentation Feedback
3
UC1543, UC1544
,
UC2543, UC2544
UC3543, UC3544
SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise stated, these specifications apply for T
A
= -55°C to 125°C for theUC1543 and UC1544; -25°C to 85°C for
the UC2543 and UC2544; and 0°C to 70°C for the UC3543 and UC3544. Electrical tests are performed with V
IN
= 10 V and
2-kΩ pull-up resistors on all indicator outputs. All electrical specifications for the UC1544, UC2544, and UC3544 devices are
tested with the inverting over-voltage input and the non-inverting under-voltage input externallyconnected to the 2.5 V
reference. T
A
= T
J
.
Current Limit Section
Input voltage range
Input Bias Current
Input offset voltage
CMRR
AVOL
Output saturation
Output leakage
Small signal bandwidth
Propagation delay
Offset pin open, V
CM
= 0
Offset pin open, V
CM
= 0
10k from offset pin to GND
0
≤
V
CM
≤
12 V, V
IN
= 15 V
Offset pin open, V
CM
= 0
V,
R
L
= 10 kΩ to 15 kΩ,
V
OUT
= 1 to 6 V
I
L
= 10 mA
V
IND
= 40 V
A
V
= 0dB, T
J
= 25°C
V
OVERDRIVE
= 100 mV,
T
J
= 25°C
80
60
72
0
-0.3
0
100
70
80
0.2
0.01
5
200
0.5
1.0
VIN -3V
-1.0
10
120
80
60
72
0
-0.3
0
100
70
80
0.2
0.01
5
200
0.5
1.0
dB
VIN -3V
-1.0
10
120
V
µA
mV
V
µA
MHz
ns
TYPICAL CHARACTERISTICS
Figure 1.
Figure 2.
4
Submit Documentation Feedback
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
