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5962R9578401VEC

产品描述HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, METAL SEALED, SIDE BRAZED, CERAMIC, DIP-16
产品类别逻辑    逻辑   
文件大小170KB,共9页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 选型对比 全文预览

5962R9578401VEC概述

HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, METAL SEALED, SIDE BRAZED, CERAMIC, DIP-16

5962R9578401VEC规格参数

参数名称属性值
零件包装代码DIP
包装说明DIP, DIP16,.3
针数16
Reach Compliance Codecompliant
系列HC/UH
JESD-30 代码R-CDIP-T16
JESD-609代码e4
长度19.05 mm
负载电容(CL)50 pF
逻辑集成电路类型J-KBAR FLIP-FLOP
最大I(ol)0.004 A
位数2
功能数量2
端子数量16
最高工作温度125 °C
最低工作温度-55 °C
输出极性COMPLEMENTARY
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DIP
封装等效代码DIP16,.3
封装形状RECTANGULAR
封装形式IN-LINE
电源5 V
Prop。Delay @ Nom-Sup35 ns
传播延迟(tpd)35 ns
认证状态Not Qualified
筛选级别38535V;38534K;883S
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层GOLD
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
总剂量100k Rad(Si) V
触发器类型POSITIVE EDGE
宽度7.62 mm
Base Number Matches1

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HCS109MS
September 1995
Radiation Hardened
Dual JK Flip Flop
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
R1
J1
K1
CP1
S1
Q1
Q1
GND
1
2
3
4
5
6
7
8
16 VCC
15 R2
14 J2
13 K2
12 CP2
11 S2
10 Q2
9 Q2
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Cosmic Ray Upset Immunity < 2 x 10
(Typ)
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
5µA at VOL, VOH
-9
Errors/Bit-Day
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
R1
J1
K1
CP1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
R2
J2
K2
CP2
S2
Q2
Q2
Description
The Intersil HCS109MS is a Radiation Hardened Dual JK
Flip Flop with set and reset. The flip flop changes state with
the positive transition of the clock (CP1 or CP2).
The HCS109MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS109MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
S1
Q1
Q1
GND
Ordering Information
PART NUMBER
HCS109DMSR
HCS109KMSR
HCS109D/Sample
HCS109K/Sample
HCS109HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
103
518748
2466.2

5962R9578401VEC相似产品对比

5962R9578401VEC 5962R9578401VXC
描述 HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, METAL SEALED, SIDE BRAZED, CERAMIC, DIP-16 HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16
零件包装代码 DIP DFP
包装说明 DIP, DIP16,.3 DFP, FL16,.3
针数 16 16
Reach Compliance Code compliant compliant
系列 HC/UH HC/UH
JESD-30 代码 R-CDIP-T16 R-CDFP-F16
JESD-609代码 e4 e4
负载电容(CL) 50 pF 50 pF
逻辑集成电路类型 J-KBAR FLIP-FLOP J-KBAR FLIP-FLOP
最大I(ol) 0.004 A 0.004 A
位数 2 2
功能数量 2 2
端子数量 16 16
最高工作温度 125 °C 125 °C
最低工作温度 -55 °C -55 °C
输出极性 COMPLEMENTARY COMPLEMENTARY
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DIP DFP
封装等效代码 DIP16,.3 FL16,.3
封装形状 RECTANGULAR RECTANGULAR
封装形式 IN-LINE FLATPACK
电源 5 V 5 V
Prop。Delay @ Nom-Sup 35 ns 35 ns
传播延迟(tpd) 35 ns 35 ns
认证状态 Not Qualified Not Qualified
筛选级别 38535V;38534K;883S 38535V;38534K;883S
座面最大高度 5.08 mm 2.92 mm
最大供电电压 (Vsup) 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V
表面贴装 NO YES
技术 CMOS CMOS
温度等级 MILITARY MILITARY
端子面层 GOLD GOLD
端子形式 THROUGH-HOLE FLAT
端子节距 2.54 mm 1.27 mm
端子位置 DUAL DUAL
总剂量 100k Rad(Si) V 100k Rad(Si) V
触发器类型 POSITIVE EDGE POSITIVE EDGE
宽度 7.62 mm 6.73 mm
Base Number Matches 1 1

 
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