IMPORTANT NOTICE
10 December 2015
1. Global joint venture starts operations as WeEn Semiconductors
Dear customer,
As from November 9th, 2015 NXP Semiconductors N.V. and Beijing JianGuang Asset
Management Co. Ltd established Bipolar Power joint venture (JV),
WeEn Semiconductors,
which
will be used in future Bipolar Power documents together with new contact details.
In this document where the previous NXP references remain, please use the new links as shown
below.
WWW
- For www.nxp.com use
www.ween-semi.com
Email
- For salesaddresses@nxp.com use
salesaddresses@ween-semi.com
For the copyright notice at the bottom of each page (or elsewhere in the document, depending
on the version) “
©
NXP Semiconductors N.V.
{year}.
All rights reserved”
becomes “
©
WeEn
Semiconductors Co., Ltd.
{year}.
All rights reserved”
If you have any questions related to this document, please contact our nearest sales office via e-
mail or phone (details via
salesaddresses@ween-semi.com).
Thank you for your cooperation and understanding,
WeEn Semiconductors
TO
-2
20F
BUJ302AX
NPN power transistor
Rev. 02 — 28 March 2011
Product data sheet
1. Product profile
1.1 General description
High-voltage, high-speed planar-passivated NPN power switching transistor in a
SOT186A (TO-220F) plastic package.
1.2 Features and benefits
Fast switching
High voltage capability
Isolated package
Low thermal resistance
1.3 Applications
DC-to-DC converters
High-frequency electronic lighting
ballast applications
Inverters
Motor control systems
1.4 Quick reference data
Table 1.
Symbol
I
C
P
tot
V
CESM
Quick reference data
Parameter
collector current
total power
dissipation
collector-emitter
peak voltage
DC current gain
Conditions
see
Figure 1;
see
Figure 2;
see
Figure 4
T
h
≤
25 °C; see
Figure 3
V
BE
= 0 V
Min
-
-
-
Typ
-
-
-
Max Unit
4
26
A
W
1050 V
Static characteristics
h
FE
I
C
= 0.1 A; V
CE
= 5 V; T
h
= 25 °C;
see
Figure 11
I
C
= 0.8 A; V
CE
= 3 V; T
h
= 25 °C;
see
Figure 12
48
25
66
42
100
50
NXP Semiconductors
BUJ302AX
NPN power transistor
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
B
C
E
n.c.
base
collector
emitter
isolated
E
sym123
Simplified outline
mb
Graphic symbol
C
B
1 2 3
SOT186A (TO-220F)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUJ302AX
TO-220F
Description
plastic single-ended package; isolated heatsink mounted;
1 mounting hole; 3-lead TO-220 "full pack"
Version
SOT186A
Type number
4. Limiting values
Table 4.
Symbol
V
CESM
V
CEO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
V
EBO
Limiting values
Parameter
collector-emitter peak voltage
collector-emitter voltage
collector current
peak collector current
base current
peak base current
total power dissipation
storage temperature
junction temperature
emitter-base voltage
I
C
= 0 A; I
E
= 2 A; t
p
< 10 ms
T
h
≤
25 °C; see
Figure 3
DC
Conditions
V
BE
= 0 V
I
B
= 0 A
see
Figure 1;
see
Figure 2;
see
Figure 4
Min
-
-
-
-
-
-
-
-65
-
-
Max
1050
400
4
8
2
4
26
150
150
24
Unit
V
V
A
A
A
A
W
°C
°C
V
In accordance with the Absolute Maximum Rating System (IEC 60134).
BUJ302AX
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 28 March 2011
2 of 13
NXP Semiconductors
BUJ302AX
NPN power transistor
10
I
C
(A)
8
003aag027
V
CC
L
C
V
CL(CE)
probe point
6
I
Bon
V
BB
L
B
DUT
001aab999
4
2
0
0
400
800
1200
V
CEclamp
(V)
Fig 1.
Reverse bias safe operating area
120
P
der
(%)
80
Fig 2.
Test circuit for reverse bias safe operating area
03aa13
40
0
0
50
100
150
T
h
(°C)
200
Fig 3.
Normalized total power dissipation as a function of heatsink temperature
BUJ302AX
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 28 March 2011
3 of 13
NXP Semiconductors
BUJ302AX
NPN power transistor
10
2
I
C
(A)
10
I
CM(max)
I
C(max)
(1)
001aac001
duty cycle = 0.01
II
(3)
t
p
= 20
μs
50
μs
100
μs
200
μs
500
μs
DC
1
(2)
10
−1
10
−2
I
(3)
III
(3)
10
−3
1
10
10
2
V
CEclamp
(V)
10
3
1)Ptot maximum and Ptot peak maximum lines
2)Second breakdown limits
3) I = Region of permissable DC operation
II = Extension for repetitive pulse operation
III = Extension during turn-on in single transistor converters
provided that RBE
≤
100
Ω
and tp
≤
0.6
μs
Fig 4.
Forward bias safe operating area for Tmb
≤
25 °C
BUJ302AX
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 28 March 2011
4 of 13
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