LT1185
Low Dropout Regulator
FEATURES
s
s
s
s
s
s
s
s
s
s
Low Resistance Pass Transistor: 0.25Ω
Dropout Voltage: 0.75V at 3A
±1%
Reference Voltage
Accurate
Programmable Current Limit
Shutdown Capability
Internal Reference Available
Standard 5-Lead Packages
Full Remote Sense
Low Quiescent Current:
≈
2.5mA
Good High Frequency Ripple Rejection
The LT1185 uses a saturation-limited NPN transistor as
the pass element. This device gives the linear dropout
characteristics of an FET pass element with significantly
less die area. High efficiency is maintained by using special
anti-saturation circuitry that adjusts base drive to track
load current. The “on resistance” is typically 0.25Ω.
Accurate current limit is programmed with a single 1/8W
external resistor, with a range of zero to three amperes. A
second, fixed internal limit circuit prevents destructive
currents if the programming current is accidentally over-
ranged. Shutdown of the regulator output is guaranteed
when the program current is less than 1µA, allowing
external logic control of output voltage.
The LT1185 has all the protection features of previous LTC
regulators, including power limiting and thermal shut-
down. The 4-lead TO-3 package is specified for –55°C to
150°C operation and the 5-lead TO-220 is specified over
0°C to 125°C.
, LTC and LT are registered trademarks of Linear Technology Corporation.
DESCRIPTIO
The LT
®
1185 is a 3A low dropout regulator with adjustable
current limit and remote sense capability. It can be used as
a positive output regulator with floating input or as a
standard negative regulator with grounded input. The
output voltage range is 2.5V to 25V, with
±1%
accuracy on
the internal reference voltage.
TYPICAL APPLICATI
5V, 3A Regulator with 3.5A Current Limit
+
+
C2
2µF
TANT
R
LIM
*
4.3k
REF
GND
FB
R1
2.37k
+
V
IN
– V
OUT
(V)
V
IN
6V TO 16V
–
V
IN
LT1185
V
OUT
*CURRENT LIMIT = 15k/R
LIM
= 3.5A
UO
U
+
R2
2.67k
C1
2µF
TANT
V
OUT
5V AT 3A
LT1185 • TA01
Dropout Voltage
1.6
1.4
1.2
1.0
T
J
= 25°C
0.8
0.6
0.4
T
J
= –55°C
0.2
0
0
1
2
LOAD CURRENT (A)
LT1185 • TA02
T
J
= 125°C
–
3
4
1
LT1185
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
BOTTOM VIEW
GND
1
FB
Input Voltage .......................................................... 35V
Input-Output Differential ......................................... 30V
FB Voltage ................................................................ 7V
REF Voltage .............................................................. 7V
Output Voltage ........................................................ 30V
Output Reverse Voltage ............................................ 2V
Operating Ambient Temperature Range
LT1185C ............................................... 0°C to 70°C
LT1185M ......................................... – 55°C to 125°C
Operating Junction Temperature Range*
Control Section
LT1185C ............................................. 0°C to 125°C
LT1185I .......................................... – 40°C to 125°C
LT1185M ........................................ – 55°C to 150°C
Power Transistor Section
LT1185C ............................................. 0°C to 150°C
LT1185I .......................................... – 40°C to 150°C
LT1185M ........................................ – 55°C to 175°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................ 300°C
*See Application Section for details on calculating Operation Junction Temperature
ORDER PART
NUMBER
V
IN
(CASE)
2
3
LT1185MK
4
V
OUT
REF
K PACKAGE
4-LEAD TO-3 METAL CAN
θ
JC MAX
= 2.5°C/ W,
θ
JA
= 35°C/W
FRONT VIEW
5
4
3
2
1
TAB IS V
IN
T PACKAGE
5-LEAD PLASTIC TO-220
θ
JC MAX
= 2.5°C/ W,
θ
JA
= 50°C/W
ORDER PART
NUMBER
REF
V
OUT
V
IN
FB
GND
LT1185CT
LT1185IT
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the operating temperature range, otherwise specifications are at T
A
= 25°C.
Adjustable version, V
IN
= 7.4V, V
OUT
= 5V, I
OUT
= 1mA, R
LIM
= 4.02k, unless otherwise noted.
PARAMETER
Reference Voltage (At FB Pin)
Reference Voltage Tolerance (At FB Pin) (Note 2)
V
IN
– V
OUT
= 5V, V
OUT
= V
REF
1mA
≤
I
OUT
≤
3A
V
IN
– V
OUT
= 1.2V to V
IN
= 30V
P
≤
25W (Note 6), V
OUT
= 5V
T
MIN
≤
T
J
≤
T
MAX
(Note 9)
Feedback Pin Bias Current
Droput Voltage (Note 3)
Load Regulation (Note 7)
Line Regulation (Note 7)
Minimum Input Voltage
Internal Current Limit (See Graph for
Guaranteed Curve) (Note 12)
V
OUT
= V
REF
I
OUT
= 0.5A, V
OUT
= 5V
I
OUT
= 3A, V
OUT
= 5V
I
OUT
= 5mA to 3A
V
IN
– V
OUT
= 1.5V to 10V, V
OUT
= 5V
V
IN
– V
OUT
= 1V to 20V, V
OUT
= 5V
I
OUT
= 1A (Note 4), V
OUT
= V
REF
I
OUT
= 3A
1.5V
≤
V
IN
– V
OUT
≤
10V
V
IN
– V
OUT
= 15V
V
IN
– V
OUT
= 20V
V
IN
– V
OUT
= 30V
q
q
q
q
q
CONDITIONS
MIN
TYP
2.37
0.3
1
MAX
±1
±2.5
UNITS
V
%
%
q
0.7
0.20
0.67
0.05
0.002
4.0
4.3
3.3
3.1
2.0
1.0
0.2
3.6
3.0
1.7
0.4
2
0.37
1.00
0.3
0.01
4.2
4.4
4.2
2.6
1.0
2
U
µA
V
V
%
%/V
V
V
A
A
A
A
A
W
U
U
W W
W
LT1185
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the operating temperature range, otherwise specifications are at T
A
= 25°C.
Adjustable version, V
IN
= 7.4V, V
OUT
= 5V, I
OUT
= 1mA, R
LIM
= 4.02k, unless otherwise noted.
PARAMETER
External Current Limit
Programming Constant
External Current Limit Error
Quiescent Supply Current
Supply Current Change with Load
REF Pin Shutoff Current
Thermal Regulation (See Applications
Information)
Reference Voltage Temperature Coefficient
Thermal Resistance Junction to Case
V
IN
– V
OUT
= 10V
I
OUT
= 5mA to 2A
(Note 8)
TO-3 Control Area
Power Transistor
TO-220 Control Area
Power Transistor
CONDITIONS
5k
≤
R
LIM
≤
15k, V
OUT
= 1V
(Note 11)
1A
≤
I
LIM
≤
3A
R
LIM
= 15k • A/I
LIM
I
OUT
= 5mA, V
OUT
= V
REF
4V
≤
V
IN
≤
25V (Note 5)
V
IN
– V
OUT
= V
SAT
(Note 10)
V
IN
– V
OUT
≥
2V
q
MIN
TYP
15k
0.02 I
LIM
0.04 I
LIM
2.5
25
10
MAX
UNITS
A•Ω
q
q
q
q
q
0.06 I
LIM
+ 0.03
0.09 I
LIM
+ 0.05
3.5
40
25
7
0.014
0.01
1
3
1
3
A
A
mA
mA/A
mA/A
µA
%/W
%/°C
°C/W
°C/W
°C/W
°C/W
0.4
2
0.005
0.003
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Reference voltage is guaranteed both at nominal conditions (no
load, 25°C) and at worst-case conditions of load, line, power and
temperature. An intermediate value can be calculated by adding the effects
of these variables in the actual application. See the Applications
Information section of this data sheet.
Note 3:
Dropout voltage is tested by reducing input voltage until the
output drops 1% below its nominal value. Tests are done at 0.5A and 3A.
The power transistor looks basically like a pure resistance in this range so
that minimum differential at any intermediate current can be calculated by
interpolation; V
DROPOUT
= 0.25V + 0.25Ω • I
OUT
. For load current less than
0.5A, see graph.
Note 4:
“Minimum input voltage” is limited by base emitter voltage drive
of the power transistor section, not saturation as measured in Note 3. For
output voltages below 4V, “minimum input voltage” specification may limit
dropout voltage before transistor saturation limitation.
Note 5:
Supply current is measured on the ground pin, and does not
include load current, R
LIM
, or output divider current.
Note 6:
The 25W power level is guaranteed for an input-output voltage of
8.3V to 17V. At lower voltages the 3A limit applies, and at higher voltages
the internal power limiting may restrict regulator power below 25W. See
graphs.
Note 7:
Line and load regulation are measured on a pulse basis with a
pulse width of
≈
2ms, to minimize heating. DC regulation will be affected
by thermal regulation and temperature coefficient of the reference. See
Applications Information section for details.
Note 8:
Guaranteed by design and correlation to other tests, but not
tested.
Note 9:
T
JMIN
= 0°C for the LT1185C, – 40°C for LT1185I, and –55°C for
the LT1185M. Power transistor area and control circuit area have different
maximum junction temperatures. Control area limits are T
JMAX
= 125°C for
the LT1185C and LT1185I and 150°C for the LT1185M. Power area limits
are 150°C for LT1185C and LT1185I and 175°C for LT1185M.
Note 10:
V
SAT
is the maximum specified dropout voltage;
0.25V + 0.25 • I
OUT
.
Note 11:
Current limit is programmed with a resistor from REF pin to GND
pin. The value is 15k/I
LIM
.
Note 12:
For V
IN
– V
OUT
= 1.5V; V
IN
= 5V, V
OUT
= 3.5V. V
OUT
= 1V for all
other current limit tests.
3
LT1185
TYPICAL PERFOR A CE CHARACTERISTICS
Internal Current Limit
5
12
10
8
6
4
V
OUT
= 5V
2
0
30
0
5
20
15
25
10
INPUT VOLTAGE (V)
30
35
I
LOAD
= 0
T
J
= 25°C
*DOES NOT INCLUDE REF CURRENT
OR OUTPUT DIVIDER CURRENT
4
OUTPUT CURRNT (A)
GUARANTEED
LIMIT
3
TYPICAL
GROUND PIN CURRENT (mA)
VOLTAGE (V)
2
GUARANTEED
LIMIT
TEST POINTS
0
1
0
25
5
15
20
10
INPUT-OUTPUT DIFFERENTIAL (V)
Ground Pin Current
160
T
J
= 25°C
140
RATIO V
OUT
/V
IN
(dB)
120
CURRENT (mA)
100
80
60
40
20
0
0
1
2
LOAD CURRENT (A)
LT1185 • TPC04
REGULATOR JUST AT
DROPOUT POINT
Load Transient Response
10
C
OUT
= 2.2µF, ESR = 1Ω
1
C
OUT
= 2.2µF, ESR = 2Ω
V
OUT
= 5V
I
OUT
= 1A
∆I
LOAD
0.1A t
r
,
f
≤
100ns
IMPEDANCE (Ω)
100mV
0
2
4
4
U W
LT1185 • TPC01
Quiescent Ground Pin Current*
2.41
2.40
2.39
2.38
2.37
2.36
2.35
2.34
Feedback Pin Voltage
Temperature Drift
2.33
–50 –25 0
25 50 75 100 125 150
JUNCTION TEMPERATURE (°C)
LT1185 • TPC03
LT1185 • TPC02
Ripple Rejection vs Frequency
–100
–80
ALL OUTPUT
VOLTAGES
WITH 0.05µF
ACROSS R2
V
OUT
= 5V
V
IN
– V
OUT
= 1.5V
–60
–40
V
IN
– V
OUT
= 5V
–20
3
4
0
100
1k
10k
100k
FREQUENCY (Hz)
1M
LT1185 • TPC05
Output Impedance
OUTPUT IMPEDANCE IS
SET BY OUTPUT CAPACITOR
ESR IN THIS REGION
0.1
0.01
V
OUT
= 5V
I
OUT
= 1A
C
OUT
= 2.2µF
0.001
1k
10k
100k
FREQUENCY (Hz)
1M
LT1183 • TPC07
6
8
10
TIME (µs)
12
14
16
LT1185 • TPC06
LT1185
APPLICATIO S I FOR ATIO
Block Diagram
A simplified block diagram of the LT1185 is shown in
Figure 1. A 2.37V bandgap reference is used to bias the
input of the error amplifier A1, and the reference amplifier
A2. A1 feeds a triple NPN pass transistor stage which has
the two driver collectors tied to ground so that the main
pass transistor can completely saturate. This topology
normally has a problem with unlimited current in Q1 and
Q2 when the input voltage is less than the minimum
required to create a regulated output. The standard “fix”
for this problem is to insert a resistor in series with Q1 and
Q2 collectors, but this resistor must be low enough in
value to supply full base current for Q3 under worst-case
V
REF
2.37V
A2
D2
A5
–
+
I1
2µA
D1
300mV
V
IN
U
conditions, resulting in very high supply current when the
input voltage is low. To avoid this situation, the LT1185
uses an auxiliary emitter on Q3 to create a drive limiting
feedback loop which automatically adjusts the drive to Q1
so that the base drive to Q3 is just enough to saturate Q3,
but no more. Under saturation conditions, the auxiliary
emitter is acting like a collector to shunt away the output
current of A1. When the input voltage is high enough to
keep Q3 out of saturation, the auxiliary emitter current
drops to zero even when Q3 is conducting full load current.
GND
R
LIM
(EXTERNAL)
REF
FB
W
U U
+
–
–
A1
Q4
+
Q1
D4
D3
Q2
Q3
A4
A3
V
OUT
+
R1
350Ω
–
+
–
R2
0.055Ω
LT1185 • BD
200mV
Figure 1. Block Diagram
5
分立器件
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
