RDS070N03
Transistors
Switching (30V, 7A)
RDS070N03
Features
1) Low Qg.
2) Low on-resistance.
3) Excellent resistance to damage from static electricity.
External dimensions
(Units : mm)
+
0.4
−
0.1
0.1
1.27
0.15
+
1.5
−
0.1
Max.1.75
+
5.0
−
0.2
(5)
(4)
Structure
Silicon N-channel
MOS FET
(8)
+
3.9
−
0.15
+
6.0
−
0.3
+
0.5
−
0.1
(1)
Equivalent circuit
(8) (7) (6) (5)
(8) (7) (6) (5)
ROHM : SOP8
(4)
(1) (2) (3) (4)
∗
(1) (2) (3)
∗
Gate Protection Diode.
∗
A protection diode is included between the gate
and the source terminals to protect the diode
against static electricity when the product is in
use.Use a protection circuit when the fixed
voltage are exceeded.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Source
Source
Source
Gate
Drain
Drain
Drain
Drain
Absolute maximum ratings
(Ta = 25°C)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous
Drain Current
Reverse Drain
Current
Source Current
(Body Diode)
Pulsed
Continuous
Pulsed
Continuous
Pulsed
Symbol
V
DSS
V
GSS
I
D
I
DP
∗
I
DR
I
DRP
∗
I
s
I
sp
∗
P
D
Tch
Tstg
Limits
30
±20
7
28
7
28
1.6
Unit
V
V
A
A
A
A
A
A
W
°C
°C
6.4
2.5
150
−55~+150
Total Power Dissipation(Tc=25°C)
Channel Temperature
Storage Temperature
∗
Pw≤10µs, Duty cycle≤1%
+
0.2
−
0.1
Each lead has same dimensions
RDS070N03
Transistors
Thermal resistance
(Ta = 25°C)
Parameter
Channel to Ambient
Symbol
Rth(ch-A)
Limits
62.5
Unit
°C/W
Electrical characteristics
(Ta = 25°C)
Parameter
Gate-Source Leakage
Symbol
I
GSS
Min.
−
30
−
1.0
−
Static Drain-Source On-State
Resistance
Forward Transfer Admittance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
R
DS(on)
∗
l Y
fs
l
∗
C
iss
C
oss
C
rss
t
d(on)
∗
t
r
∗
t
d(off)
∗
t
f
∗
Q
g
∗
Q
gs
∗
Q
gd
∗
−
−
5
−
−
−
−
−
−
−
−
−
−
Typ.
−
−
−
−
23
38
47
−
470
260
105
10
14
35
12
14
2
4
Max.
±10
−
10
2.5
−
−
−
−
−
−
−
−
−
−
−
28
−
−
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
mΩ
Unit
µA
V
µA
V
Test Conditions
V
GS
=±20V, V
DS
=0V
I
D
=1mA, V
GS
=0V
V
DS
=30V, V
GS
=0V
V
DS
=10V, I
D
=1mA
I
D
=7A, V
GS
=10V
I
D
=7A, V
GS
=4.5V
I
D
=7A, V
GS
=4.0V
I
D
=7A, V
DS
=10V
V
DS
=10V
V
GS
=0V
f=1MHz
I
D
=3.5A, V
DD
15V
V
GS
=10V
R
L
=4.3Ω
R
GS
=10Ω
V
DD
=15V
V
GS
=10V
I
D
=7A
Drain-Source Breakdown Voltage V
(BR) DSS
Zero Gate Voltage Drain Current
Gate Threshold Voltage
I
DSS
V
GS(th)
∗
Pulsed
Body diode characteristics (Source-Drain characteristics)
(Ta = 25°C)
Parameter
Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Symbol
V
SD
∗
t
rr
∗
Q
rr
∗
Min.
−
−
−
Typ.
−
46
46
Max.
1.5
−
−
Unit
V
ns
nC
Test Conditions
I
s
=6.4A, V
GS
=0V
I
DR
=5.2A, V
GS
=0V
di/dt=100A/µs
∗
Pulsed
RDS070N03
Transistors
Electrical characteristic curves
FORWARD TRANSFER ADMITTANCE : I Y
fS
I
(S)
10
REVERSE DREIN CURRENT : I
DR
(A)
1
Ta=125°C
75°C
25°C
−25°C
10
STATIC DRAIN-SOURCE
ON-STATE RESISTANCE : R
DS(on)
(Ω)
V
DS
=0V
Pulsed
100
V
DS
=10V
Pulsed
1
0.1
1
Ta=−25°C
25°C
75°C
125°C
0.1
0.01
0.1
Ta=125°C
75°C
25°C
−25°C
0.01
0.0
0.5
1.0
1.5
0.01
0.01
0.1
1
10
100
0.001
0.1
1
10
V
GS
=4.5V
Pulsed
100
SOURCE - DRAIN VOLTAGE : V
GS
(V)
DRAIN CURRENT : I
D
(A)
DRAIN CURRENT : I
D
(A)
Fig.1 Reverse Drein Current
vs. Source-Drain Voltage
Fig.2 Forward Transfer Admittance
vs. Drain Current
Fig.3 Static Drain-Source
On-State Resistance
vs. Drain Current (Ι)
1
STATIC DRAIN-SOURCE
ON-STATE RESISTANCE : R
DS(on)
(Ω)
STATIC DRAIN-SOURCE
ON-STATE RESISTANCE : R
DS(on)
(Ω)
V
GS
=10V
Pulsed
V
GS
=10V
0.045 Pulsed
0.04
STATIC DRAIN-SOURCE
ON-STATE RESISTANCE : R
DS(on)
(Ω)
0.05
0.08
Ta=25°C
Pulsed
0.06
I
D
=7A
0.1
0.035
0.03
I
D
=7V
0.02
0.025
0.04
0.01
Ta=125°C
75°C
25°C
−25°C
0.015
0.01
I
D
=3.5A
0.02
0.005
0
−50 −25
0
25
50
75
100 125 150
0.001
0.1
1
10
100
0
0
5
10
15
20
DRAIN CURRENT : I
D
(A)
CHANNEL TEMPERATURE : Tch (°C)
GATE-SOURCE VOLTAGE : V
GS
(V)
Fig.4 Static Drain-Source
On-State Resistance
vs. Drain Current (ΙΙ)
Fig.5 Static Drain-Source
On-State Resistance vs.
Channel Temperature
Fig.6 Static Drain-Source
On-State Resistance vs.
Gate-Source Voltage
GATE THRESHOLD VOLTAGE : V
GS(th)
(V)
4
DRAIN-SOURCE VOLTAGE : V
DS
(V)
3
CAPACITANCE : C
(pF)
C
iss
25
20
15
10
5
0
0
V
DS
=24V
V
DS
=15V
V
DS
=10V
10
8
6
4
C
oss
100
C
rss
2
1
0
−50 −25
0
25
50
75
100 125 150
Ta=25°C
f=1MHz
10 V
GS
=0V
0.1
1
10
100
2
4
6
8
Ta=25°C 2
I
D
=7A
Pulsed
0
14
10
12
CHANNEL TEMPERATURE : Tch (°C)
DRAIN-SOURCE VOLTAGE : V
DS
(V)
TOTAL GATE CHARGE : Qg (
nC)
Fig.7 Gate Threshold Voltage
vs. Channel Temperature
Fig.8 Typical Capacitance
vs. Drain-Source Voltage
Fig.9 Dynamic Input Characteristics
GATE-SOURCE VOLTAGE : V
GS
(V)
V
DS
=10V
I
D
=1mA
Pulsed
1000
30
V
DS
=10V
V
DS
=15V
V
DS
=24V
12
RDS070N03
Transistors
10000
10
SWITCHING TIME : t
(ns)
1000
100
t
f
t
d(off)
DRAIN CURRENT : I
D
(A)
Ta=25°C
V
DD
15V
V
GS
=10V
R
G
=10Ω
Pulsed
10V
4.5V
4.0V
5.0V
6.0V
Ta=25°C
Pulsed
3.5V
5
3.0V
t
r
10
t
d(on)
V
GS
=2.5V
1
0.01
0.1
1
10
0
0
1
2
3
4
5
DRAIN CURRENT : I
D
(A)
DRAIN-SOURCE VOLTAGE : V
DS
(V)
Fig.10 Switching Characteristics
Fig.11 Typical Output Characteristics
10
NORMALIZED TRANSIENT : r
(t)
THERMAL RESISTANCE
1
D=1
D=0.5
D=0.2
0.1
D=0.1
D=0.05
D=0.02
D=0.01
D=Single
Tc=25°C
θ
th(ch-c)
(t)=r(t)
θ
th(ch-c)
θ
th(ch-c)
=6.25°C / W
PW
T
D=PW
T
0.01
0.001
10µ
100µ
1m
10m
100m
1
10
100
PULSE WIDTH : PW
(s)
Fig.12 Normalized Transient Thermal
Resistance vs. Pulse Width
FPGA/CPLD
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