LT1301
Micropower High Efficiency
5V/12V Step-Up DC/DC
Converter for Flash Memory
FEATURES
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DESCRIPTION
The LT1301 is a micropower step-up DC/DC converter that
utilizes Burst Mode™ operation. The device can deliver 5V
or 12V from a two-cell battery input. It features program-
mable 5V or 12V output via a logic-controlled input, no-
load quiescent current of 120µA and a shutdown pin which
reduces supply current to 10µA. The on-chip power switch
has a low 170mV saturation voltage at a switch current of
1A, a four-fold reduction over prior designs. A 155kHz
internal oscillator allows the use of extremely small sur-
face mount inductors and capacitors. Operation is guaran-
teed at 1.8V input. This allows more energy to be extracted
from the battery, increasing operating life. The I
LIM
pin can
be used for soft start or to program peak switch current
with a single resistor allowing the use of even smaller
inductors in lighter load applications. The LT1301 is
available in an 8-lead SOIC package, minimizing board
space requirements. For a selectable 3.3V/5V step-up
converter, please see the LT1300. For higher output
power, see the LT1302.
Burst Mode is a trademark of Linear Technology Corporation.
12V at 120mA from 5V or 3.3V Supply
Supply Voltage as Low as 1.8V
Better High Current Efficiency Than CMOS
Up to 89% Efficiency
120µA Quiescent Current
Shutdown to 10µA
Programmable 5V or 12V Output
Low V
CESAT
Switch: 170mV at 1A Typical
I
LIM
Pin Programs Peak Switch Current
Uses Inexpensive Surface Mount Inductors
8-Lead DIP or SOIC Package
APPLICATIONS
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Flash Memory V
PP
Generator
Palmtop Computers
Portable Instruments
Bar-Code Scanners
Personal Digital Assistants
PCMCIA Cards
TYPICAL APPLICATIONS
N
5V
OR
3.3V
V
IN
SELECT
L1
33µH
D1
Output Voltage
12V
OUTPUT
12V
V
OUT
2V/DIV
SW
SENSE
47µF
SHUTDOWN SHDN
PGND
+
C2
I
LIM
GND
N/C
33µF
20V
0.1µF*
SHUTDOWN
10V/DIV
1ms/DIV
LT1301 F1
EFFICIENCY (%)
+
C1
LT1301
*REQUIRED FOR 5V OUTPUT
L1 = COILCRAFT DO3316-333
OR SUMIDA CD73-330KC
D1 = 1N5817 OR MOTOROLA
MBRS130LT3
C1 = AVX TPSD476M016R0100
OR SANYO OS-CON 165A47M
C2 = AVX TPSD336M020R0100
OR SANYO OS-CON 205A33M
V
IN
= 5V, V
OUT
= 12V
LOAD = 100Ω
LT1301 TAO1
Figure 1. 3.3V/5V to 12V Step-Up Converter
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U
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Efficiency
90
88
86
84
82
80
78
76
74
72
0
1
10
100
LOAD CURRENT (mA)
300
LT1301 TA2
V
IN
= 5V
V
IN
= 3.3V
LT1300 F2
1
LT1301
ABSOLUTE
MAXIMUM
RATINGS
V
IN
Voltage .............................................................. 10V
SW1 Voltage ............................................................ 20V
Sense Voltage .......................................................... 20V
Shutdown Voltage ................................................... 10V
Select Voltage .......................................................... 10V
I
LIM
Voltage ............................................................ 0.5V
Maximum Power Dissipation ............................. 500mW
Operating Temperature Range
LT1301C ................................................... 0°C to 70°C
LT1301I .................................................. 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
GND 1
SEL 2
SHDN 3
SENSE 4
N8 PACKAGE
8-LEAD PLASTIC DIP
8
7
6
5
PGND
SW
V
IN
I
LIM
ORDER PART
NUMBER
LT1301CN8
LT1301CS8
LT1301IS8
S8 PART MARKING
1301
1301I
S8 PACKAGE
8-LEAD PLASTIC SOIC
T
JMAX
= 100°C,
θ
JA
= 150°C/ W
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
I
Q
Quiescent Current
V
IN
V
OUT
Input Voltage Range
T
A
= 25°C, V
IN
= 2V unless otherwise noted.
MIN
q
q
q
CONDITIONS
V
SHDN
= 0.5V, V
SEL
= 5V, V
SENSE
= 5.5V
V
SHDN
= 1.8V
TYP
120
7
MAX
200
15
Output Sense Voltage
Output Referred
Comparator Hysteresis
Oscillator Frequency
Oscillator TC
Maximum Duty Cycle
Switch On-Time
Output Line Regulation
Switch Saturation Voltage
Switch Leakage Current
Peak Switch Current
(Internal Trip Point)
Shutdown Pin High
Shutdown Pin Low
Select Pin High
Select Pin Low
Shutdown Pin Bias Current
V
SEL
= 5V
V
SEL
= 0V
V
SEL
= 5V (Note 1)
V
SEL
= 0V (Note 1)
Current Limit not Asserted.
q
q
q
q
1.8
2.0
11.52
4.75
120
75
DC
t
ON
V
CESAT
Current Limit not Asserted.
1.8V < V
IN
< 6V
I
SW
= 700mA
V
SW
= 5V, Switch Off
I
LIM
Floating (See Typical Application)
I
LIM
Grounded
q
q
q
0.75
q
q
q
12.00
5.00
50
22
155
0.2
86
5.6
0.06
130
0.1
1.0
0.4
12.48
5.25
100
50
185
95
0.15
200
10
1.25
V
SHDNH
V
SHDNL
V
SELH
V
SELL
I
SHDN
1.8
0.5
1.5
8
3
0.1
1
0.8
20
1
3
I
SEL
Select Pin Bias Current
V
SHDN
= 5V
V
SHDN
= 2V
V
SHDN
= 0V
0V < V
SEL
< 5V
q
q
q
q
UNITS
µA
µA
V
V
V
V
mV
mV
kHz
%/
°C
%
µs
%/V
mV
µA
A
A
V
V
V
V
µA
µA
µA
µA
The
q
denotes specifications which apply over the 0°C to 70°C
temperature range.
Note 1:
Hysteresis specified is DC. Output ripple may be higher if
output capacitance is insufficient or capacitor ESR is excessive.
See operation section.
2
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W
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W W
W
LT1301
TYPICAL PERFORMANCE CHARACTERISTICS
5V Output Efficiency
90
88
86
84
V
IN
= 3.3V
60
50
40
30
20
10
0
SHUTDOWN CURRENT (µA)
I
SHDN
+ I
VIN
+ I
SENSE
(µA)
EFFICIENCY (%)
V
IN
= 2.5V
82
80
78
76
74
72
70
1
10
100
LOAD CURRENT (mA)
1000
LT1301 G1
Saturation Voltage vs Switch Current
250
225
SATURATION VOLTAGE (mV)
T
A
= 25°C
200
175
150
125
100
75
50
25
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
SWITCH CURRENT (A)
1
INPUT CURRENT (µA)
Load Transient Response of
Figure 1 Circuit
12V
V
OUT
100mV/DIV
AC COUPLED
V
OUT
2V/DIV
5V
I
LOAD
120mA
0mA
V
IN
= 3.3V
200µs/DIV
LT1301 G7
U W
LT1301 G4
Total Quiescent Current
in Shutdown
80
T
A
= 25°C
70
Shutdown Pin Bias Current
20
18
16
14
12
10
8
6
4
2
0
T
A
= 25°C
0
1
2
4
5
6
3
INPUT VOLTAGE (V)
7
8
0
1
6
4
3
2
5
SHUTDOWN VOLTAGE (V)
7
8
LT1301 G2
LT1300 G3
No-Load Input Current
500
450
400
350
300
250
200
150
100
2
V
OUT
= 5V
V
OUT
= 12V
I
LOAD
V
OUT
100mV/DIV
AC COUPLED
120mA
0mA
Load Transient Response of
Figure 1 Circuit
200µs/DIV
V
IN
= 5V
LT1301 G6
3
5
INPUT VOLTAGE (V)
4
6
7
LT1301 G5
Select Pin Transient Response
12V
V
OUT
2V/DIV
Select Pin Transient Response
5V
V
SELECT
10V/DIV
5ms/DIV
C
OUT
= 100µF, V
IN
= 5V
100Ω LOAD
5ms/DIV
LT1301 G8
LT1301 G9
V
SELECT
10V/DIV
C
OUT
= 100µF, V
IN
= 3.3V
100Ω LOAD
3
LT1301
PIN FUNCTIONS
GND (Pin 1):
Signal Ground. Tie to PGND under the
package.
Sel (Pin 2):
Output Select. When tied to V
IN
converter
regulates at 12V. When grounded or floating converter
regulates at 5V. May be driven under logic control.
SHDN (Pin 3):
Shutdown. Pull high to shut down the
LT1301. Ground for normal operation.
Sense (Pin 4):
“Output” Pin. Goes to internal resistive
divider. If operating at 5V output, a 0.1µF ceramic capaci-
tor is required from Sense to Ground.
I
LIM
(Pin 5):
Float for 1A switch current limit. Tie to ground
for approximately 400mA. A resistor between I
LIM
and
ground sets peak current to some intermediate value .
V
IN
(Pin 6):
Supply Pin. Must be bypassed with a large
value electrolytic to ground. Keep bypass within 0.2" of the
device.
SW (Pin 7):
Switch Pin. Connect inductor and diode here.
Keep layout short and direct to minimize radio frequency
interference.
PGND (Pin 8):
Power Ground. Tie to signal ground (pin 1)
under the package. Bypass capacitor from V
IN
should be
tied directly to PGND within 0.2" of the device.
BLOCK DIAGRAM
V
IN
+
C1
1.25V
REFERENCE
97.5k
4
W
U
U
U
L1
D1
V
OUT
+
C2
SENSE
4
2
V
IN
7
SW
18mV
A2 CURRENT
COMPARATOR
500k
+
R2
730Ω
R1
3Ω
–
A1
COMPARATOR
OFF
+
ENABLE OSCILLATOR
155kHZ
A3 DRIVER
–
BIAS
Q3
8.5k
Q2
1×
Q1
160×
69.2k
GND
1
2
SELECT
SHUTDOWN
3
5
I
LIM
PGND
8
LT1301 F2
Figure 2.
LT1301
TEST CIRCUITS
2V
V
IN
SEL
100µF
LT1301
I
L
SW
5V
100Ω
f
OUT
SENSE
GND
SHDN
PGND
Oscillator Test Circuit
LT1301 TC
OPERATION
Operation of the LT1301 is best understood by referring to
the Block Diagram in Figure 2. When A1’s negative input,
related to the Sense pin voltage by the appropriate resis-
tor-divider ratio is higher that the 1.25V reference voltage,
A1’s output is low. A2, A3 and the oscillator are turned off,
drawing no current. Only the reference and A1 consume
current, typically 120µA. When A1’s negative input drops
below 1.25V, overcoming A1’s 6mV hysteresis, A1’s out-
put goes high enabling the oscillator, current comparator
A2, and driver A3. Quiescent current increases to 2mA as
the device prepares for high current switching. Q1 then
turns on in controlled saturation for (nominally) 5.3µs or
until comparator A2 trips, whichever comes first. After a
fixed off-time of (nominally) 1.2µs, Q1 turns on again. The
LT1301’s switching causes current to alternately build up
in L1 and dump into output capacitor C2 via D1, increasing
the output voltage. When the output is high enough to
cause A1’s output to go to low, switching action ceases.
C2 is left to supply current to the load until V
OUT
decreases
enough to force A1’s output high, and the entire cycle
repeats. Figure 4 details relevant waveforms. A1’s cycling
causes low-to-mid-frequency ripple voltage on the output.
Ripple can be reduced by making the output capacitor
large. The 33µF unit specified results in ripple of 100mV to
200mV on the 12V output. A 100µF capacitor will decrease
ripple to 50mV. If operating at 5V ouput a 0.1µF ceramic
capacitor is required at the Sense pin in addition to the
electrolytic.
If switch current reaches 1A, causing A2 to trip, switch on-
time is reduced and off-time increases slightly. This allows
continuous mode operation during bursts. A2 monitors
the voltage across 3Ω resistor R1 which is directly related
to the switch current. Q2’s collector current is set by the
emitter-area ratio to 0.6% of Q1’s collector current. When
R1’s voltage drop exceeds 18mV, corresponding to 1A
switch current, A2’s output goes high, truncating the on-
time portion of the oscillator cycle and increasing off-time
to about 2µs as shown in Figure 3, trace A. This pro-
grammed peak current can be reduced by tying the I
LIM
pin
to ground, causing 15µA to flow through R2 into Q3’s
collector. Q3’s current causes a 10.4mV drop in R2 so that
only an additional 7.6mV is required across R1 to turn off
the switch. This corresponds to a 400mA switch current
as shown in Figure 3, trace B. The reduced peak switch
current reduces I
2
R loses in Q1, L1, C1 and D1. Efficiency
can be increased by doing this provided that the accom-
panying reduction in full load current is acceptable. Lower
peak currents also extend alkaline battery life due to the
alkaline cell’s high internal impedance.
TRACE A
500mA/DIV
I
LIM
PIN
OPEN
TRACE B
500mA/DIV
I
LIM
PIN
GROUNDED
20µs/DIV
U
Figure 3. Switch Pin Current With I
LIM
Floating or Grounded
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