LT1715
4ns, 150MHz
Dual Comparator with
Independent Input/Output Supplies
FEATURES
s
s
s
s
s
s
s
s
DESCRIPTIO
s
UltraFast: 4ns at 20mV Overdrive
150MHz Toggle Frequency
Separate Input and Output Power Supplies
Low Power: 4.6mA per Comparator at 3V
Pinout Optimized for High Speed Use
Output Optimized for 3V and 5V Supplies
TTL/CMOS Compatible Rail-to-Rail Output
Input Voltage Range Extends 100mV
Below Negative Rail
Internal Hysteresis with Specified Limits
The LT
®
1715 is an UltraFast
TM
dual comparator optimized
for low voltage operation. Separate supplies allow inde-
pendent analog input ranges and output logic levels with
no loss of performance. The input voltage range extends
from 100mV below V
EE
to 1.2V below V
CC
. Internal hyster-
esis makes the LT1715 easy to use even with slow moving
input signals. The rail-to-rail outputs directly interface to
TTL and CMOS. The symmetric output drive results in
similar rise and fall times that can be harnessed for analog
applications or for easy translation to other single supply
logic levels.
The LT1715 is available in the 10-pin MSOP package. The
pinout of the LT1715 minimizes parasitic effects by plac-
ing the most sensitive inputs away from the outputs,
shielded by the power rails.
For a dual/quad single supply comparator with similar
propagation delay, see the LT1720/LT1721. For a single
comparator with similar propagation delay, see the LT1719.
, LTC and LT are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
APPLICATIO S
s
s
s
s
s
s
s
High Speed Differential Line Receivers
Level Translators
Window Comparators
Crystal Oscillator Circuits
Threshold Detectors/Discriminators
High Speed Sampling Circuits
Delay Lines
TYPICAL APPLICATIO
5V
100MHz Dual Differential Line Receiver
3V
Line Receiver Response to 100MHz Clock,
50MHz Data Both with 25mV
P-P
Inputs
3V
+
IN A
OUT A
CLOCK OUT
–
0V
3V
+
IN B
OUT B
DATA OUT
0V
FET PROBES
5ns/DIV
1715 TA02
–
–5V
1715 TA01
U
1V/DIV
1V/DIV
U
U
1
LT1715
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
+IN A
–IN A
–IN B
+IN B
V
EE
1
2
3
4
5
A
B
10
9
8
7
6
V
CC
+V
S
OUT A
OUT B
GND
Supply Voltage
+ V
S
to GND .......................................................... 7V
V
CC
to V
EE
........................................................ 13.2V
+ V
S
to V
EE
....................................................... 13.2V
V
EE
to GND ....................................... – 13.2V to 0.3V
Input Current (+ IN, – IN) ...................................
±10mA
Output Current (Continuous) ............................
±20mA
Operating Temperature Range ................ – 40°C to 85°C
Specified Temperature Range (Note 2) ... – 40°C to 85°C
Junction Temperature .......................................... 150°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
LT1715CMS
LT1715IMS
MS10 PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 120°C/ W (NOTE 3)
MS10 PART MARKING
LTVQ
LTVV
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
CC
– V
EE
+ V
S
V
CMR
V
TRIP+
V
TRIP–
V
OS
V
HYST
∆V
OS
/∆T
I
B
I
OS
CMRR
PSRR
A
V
V
OH
V
OL
f
MAX
t
PD20
PARAMETER
Input Supply Voltage
Output Supply Voltage
Input Voltage Range
Input Trip Points
Input Offset Voltage
Input Hysteresis Voltage
Input Offset Voltage Drift
Input Bias Current
Input Offset Current
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Voltage Gain
Output High Voltage
Output Low Voltage
Maximum Toggle Frequency
Propagation Delay
The
q
denotes specifications that apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 5V, V
EE
= –5V, +V
S
= 5V, V
CM
= 1V, C
OUT
= 10pF, V
OVERDRIVE
= 20mV,
unless otherwise specified.
CONDITIONS
q
q
MIN
2.7
2.7
V
EE
– 0.1
– 1.5
– 5.5
TYP
MAX
12
6
V
CC
– 1.2
5.5
1.5
UNITS
V
V
V
mV
mV
mV
mV
mV
µV/°C
µA
µA
dB
dB
V
(Note 4)
(Note 5)
(Note 5)
q
q
q
q
0.4
q
q
q
q
2.5
3.5
6
0
0.6
(Note 5)
2
–6
60
65
3.5
10
–2.5
0.2
70
80
(Note 6)
(Note 7)
(Note 8)
I
SOURCE
= 4mA, V
IN
= V
TRIP+
+ 20mV
I
SINK
= 10mA, V
IN
= V
TRIP–
– 20mV
(Note 9)
V
OVERDRIVE
= 20mV (Note 10),
V
CC
= 5V, V
EE
= –5V
V
OVERDRIVE
= 20mV, V
CC
= 5V, V
EE
= 0V
V
OVERDRIVE
= 20mV, V
CC
= 3V, V
EE
= 0V
q
q
∞
q
+ V
S
– 0.4
q
0.4
150
2.8
2.8
3
3
4
4.4
4.8
6
6
7
6.5
7.5
9
12
1.5
q
q
t
PD5
t
SKEW
Propagation Delay
Propagation Delay Skew
V
OVERDRIVE
= 5mV, V
EE
= 0V (Notes 10, 11)
q
(Note 12) Between t
PD+
/t
PD–
, V
EE
= 0V
q
0.5
2
U
V
MHz
ns
ns
ns
ns
ns
ns
ns
ns
W
U
U
W W
W
LT1715
ELECTRICAL CHARACTERISTICS
SYMBOL
∆t
PD
t
r
t
f
t
JITTER
I
CC
I
EE
I
S
PARAMETER
Differential Propagation Delay
Output Rise Time
Output Fall Time
Output Timing Jitter
Positive Input Stage Supply Current
(per Comparator)
Negative Input Stage Supply Current
(per Comparator)
Positive Output Stage Supply Current
(per Comparator)
The
q
denotes specifications that apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 5V, V
EE
= –5V, +V
S
= 5V, V
CM
= 1V, C
OUT
= 10pF, V
OVERDRIVE
= 20mV,
unless otherwise specified.
CONDITIONS
(Note 13) Between Channels
10% to 90%
90% to 10%
V
IN
= 1.2V
P-P
(6dBm), Z
IN
= 50Ω
f = 20MHz (Note 14)
+ V
S
= V
CC
= 5V, V
EE
= – 5V
+ V
S
= V
CC
= 3V, V
EE
= 0V
+ V
S
= V
CC
= 5V, V
EE
= – 5V
+ V
S
= V
CC
= 3V, V
EE
= 0V
+ V
S
= V
CC
= 5V, V
EE
= – 5V
V
S
= V
CC
= 3V, V
EE
= 0V
t
PD+
t
PD–
q
q
q
q
q
q
q
MIN
TYP
0.3
2
2
15
11
1
0.9
MAX
1
UNITS
ns
ns
ns
ps
RMS
ps
RMS
2
1.6
mA
mA
mA
mA
– 4.8
– 3.8
– 2.9
– 2.4
4.6
3.7
7.5
6
mA
mA
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LT1715C is guaranteed to meet specified performance from
0°C to 70°C. The LT1715C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1715I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 3:
Thermal resistances vary depending upon the amount of PC board
metal attached to Pin 5 of the device.
θ
JA
is specified for a 2500mm
2
3/32"
FR-4 board covered with 2oz copper on both sides and with 100mm
2
of
copper attached to Pin 5. Thermal performance can be improved beyond
the given specification by using a 4-layer board or by attaching more metal
area to Pin 5.
Note 4:
If one input is within these common mode limits, the other input
can go outside the common mode limits and the output will be valid.
Note 5:
The LT1715 comparator includes internal hysteresis. The trip
points are the input voltage needed to change the output state in each
direction. The offset voltage is defined as the average of V
TRIP+
and V
TRIP–
,
while the hysteresis voltage is the difference of these two.
Note 6:
The common mode rejection ratio is measured with V
CC
= 5V,
V
EE
= – 5V and is defined as the change in offset voltage measured from
V
CM
= – 5.1V to V
CM
= 3.8V, divided by 8.9V.
Note 7:
The power supply rejection ratio is measured with V
CM
= 1V and is
defined as the worst of: the change in offset voltage from V
CC
= + V
S
=
2.7V to V
CC
= + V
S
= 6V (with V
EE
= 0V) divided by 3.3V or the change in
offset voltage from V
EE
= 0V to V
EE
= – 6V (with V
CC
= +V
S
= 6V) divided
by 6V.
Note 8:
Because of internal hysteresis, there is no small-signal region in
which to measure gain. Proper operation of internal circuity is ensured by
measuring V
OH
and V
OL
with only 20mV of overdrive.
Note 9:
Maximum toggle rate is defined as the highest frequency at which
a 100mV sinusoidal input results in an error free output toggling to greater
than 4V when high and to less than 1V when low on a 5V output supply.
Note 10:
Propagation delay measurements made with 100mV steps.
Overdrive is measured relative to V
TRIP
±
.
Note 11:
t
PD
cannot be measured in automatic handling equipment with
low values of overdrive. The LT1715 is 100% tested with a 100mV step
and 20mV overdrive. Correlation tests have shown that t
PD
limits can be
guaranteed with this test.
Note 12:
Propagation Delay Skew is defined as:
t
SKEW
= |t
PDLH
– t
PDHL
|
Note 13:
Differential propagation delay is defined as the larger of the two:
∆t
PDLH
= |t
PDLHA
– t
PDLHB
|
∆t
PDHL
= |t
PDHLA
– t
PDHLB
|
Note 14:
Package inductances combined with asynchronous activity on
the other channel can increase the output jitter. See Channel Interactions
in Applications Information. Specification above is with one channel active
only.
3
LT1715
TYPICAL PERFOR A CE CHARACTERISTICS
Input Offset and Trip Voltages
vs Supply Voltage
3
V
OS
AND TRIP POINT VOLTAGE (mV)
COMMON MODE INPUT VOLTAGE (V)
V
OS
AND TRIP POINT VOLTAGE (mV)
V
TRIP+
2
1
V
OS
0
–1
–2
T
A
= 25°C
V
CM
= 1V
V
EE
= GND
5.5
5.0
3.0
3.5 4.0 4.5
SUPPLY VOLTAGE, V
CC
= + V
S
(V)
6.0
V
TRIP–
–3
2.5
Input Current
vs Differential Input Voltage
2
1
0
INPUT BIAS (µA)
T
A
= 25°C
V
CC
= +V
S
= 5V
V
EE
= –5V
SUPPLY CURRENT PER COMPARATOR (mA)
6
4
2
0
–2
V
CC
= +V
S
= 5V
V
EE
= –5V
I
S
SUPPLY CURRENT PER COMPARATOR (mA)
–1
–2
–3
–4
–5
–6
–7
– 5 – 4 – 3 – 2 –1 0 1 2 3 4
DIFFERENTIAL INPUT VOLTAGE (V)
5
Output Low Voltage
vs Load Current
0.5
OUTPUT VOLTAGE RELATIVE TO +V
S
(V)
0.4
V
CC
= +V
S
= 5V, UNLESS
125°C
OTHERWISE NOTED
+V
S
= 2.7V
V
IN
= –10mV
125°C
–0.1
TOTAL SUPPLY CURRENT PER COMPARATOR (mA)
OUTPUT VOLTAGE (V)
0.3
– 55°C
0.2
25°C
0.1
0
0
4
12
16
8
OUTPUT SINK CURRENT (mA)
4
U W
1715 G01
1715 G04
1715 G07
Input Offset and Trip Voltages
vs Temperature
3
2
1
0
–1
V
TRIP–
–2
–3
– 60 – 40 – 20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
1715 G02
Input Common Mode Limits
vs Temperature
4.2
4.0
3.8
3.6
– 4.8
– 5.0
– 5.2
– 5.4
– 50 – 25
+V
S
= V
CC
= 5V
V
EE
= – 5V
+V
S
= V
CC
= 5V
V
CM
= 1V
V
EE
= –5V
V
TRIP+
V
OS
50
25
75
0
TEMPERATURE (°C)
100
125
1715 G03
Quiescent Supply Current
vs Temperature
8
Quiescent Supply Current
vs Supply Voltage
6
5
4
3
2
1
0
–1
–2
–3
–4
0
I
EE
, OUTPUT LOW
I
CC
I
S
, OUTPUT LOW
T
A
= 25°C
V
EE
= GND
I
S
, OUTPUT HIGH
I
CC
I
EE
–4
–6
– 50 – 25
I
EE
, OUTPUT HIGH
4
3
2
5
6
1
SUPPLY VOLTAGE, V
CC
= + V
S
(V)
7
1715
G06
0
75
50
25
TEMPERATURE (°C)
100
125
1715
G05
Output High Voltage
vs Load Current
V
CC
= +V
S
= 5V, UNLESS
OTHERWISE NOTED
V
IN
= 10mV
– 55°C
–0.3
25°C
–0.4
125°C
–0.5
125°C
+V
S
= 2.7V
–0.6
20
0
4
12
16
8
OUTPUT SOURCE CURRENT (mA)
20
1715 G08
Supply Current
vs Toggle Frequency
30
25
C
LOAD
= 20pF
20
15
C
LOAD
= 0pF
10
5
0
0
25
50 75 100 125 150 175 200 225
TOGGLE FREQUENCY (MHz)
1715 G09
VALID
TOGGLING
INCOMPLETE
OUTPUT TOGGLING
–0.2
C
LOAD
= 10pF
T
A
= 25°C
V
IN
=
±50mV
SINUSOID
+V
S
= V
CC
= 5V
V
EE
= GND
LT1715
TYPICAL PERFOR A CE CHARACTERISTICS
Propagation Delay
vs Overdrive
8
T
A
= 25°C
V
STEP
= 100mV
C
LOAD
= 10pF
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
7
V
CC
= +V
S
= 3V
V
EE
= 0V
6
5
t
PDLH
t
PDHL
t
PDLH
V
CC
= +V
S
= 5V
V
EE
= –5V
0
10
30
OVERDRIVE (mV)
20
40
t
PDHL
50
1715 G10
4
3
Maximum Toggle Rate
vs Input Amplitude
180
T
A
= 25°C
160 +V
S
= V
CC
= 5V
V
EE
= GND
140 C
LOAD
= 10pF
120
100
80
60
40
20
0
1
10
INPUT SINUSOID AMPLITUDE (mV)
100
TOGGLE FREQUENCY (MHz)
TOGGLE FREQUENCY (MHz)
TOGGLE FREQUENCY (MHz)
Maximum Toggle Rate
vs Load Capacitance
250
225
TOGGLE FREQUENCY (MHz)
200
175
150
125
100
75
50
0
5
PROPAGATION DELAY (ns)
T
A
= 25°C
V
IN
=
±50mV
SINUSOID
+V
S
= V
CC
= 5V
V
EE
= GND
10 15 20 25 30 35 40 45 50
OUTPUT CAPACITANCE (pF)
1715 G16
U W
1715 G13
Propagation Delay
vs Temperature
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5 OVERDRIVE = 20mV
3.0
– 50 – 25
0
V
CC
= +V
S
= 5V
V
EE
= –5V
100
125
OVERDRIVE = 5mV
V
CC
= +V
S
= 3V
V
EE
= 0V
t
PDLH
C
LOAD
= 10pF
V
STEP
= 100mV
5.5
Propagation Delay
vs Supply Voltage
T
A
= 25°C
V
STEP
= 100mV
OVERDRIVE = 20mV
C
LOAD
= 10pF
t
PDLH
4.5
t
PDHL
t
PDLH
4.0
t
PDHL
3.5
2.5
V
EE
= –5V
V
EE
= GND
5.0
75
50
25
TEMPERATURE (°C)
5.5 6.0
5.0
3.0
3.5 4.0 4.5
SUPPLY VOLTAGE, +V
S
= V
CC
OR V
+
(V)
1715 G12
1715
G11
Maximum Toggle Rate
vs Temperature
250
T
A
= 25°C
230 V
IN
=
±50mV
SINUSOID
+V
S
= V
CC
= 5V
210
V
EE
= –5V
190 C
LOAD
= 10pF
R
LOAD
= 500Ω
170
150
130
110
90
70
50
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
250
225
200
175
150
125
Maximum Toggle Rate
vs Supply Voltage
TOGGLING FROM
1V TO +V
S
– 1V
TOGGLING FROM
20% TO 80% OF +V
S
100 T
A
= 25°C
V
IN
=
±50mV
SINUSOID
75 V
EE
= GND
C
LOAD
= 10pF
50
4
2
3
5
+V
S
= V
CC
SUPPLY VOLTAGE (V)
6
1715 G15
1715 G14
Propagation Delay
vs Load Capacitance
8
T
A
= 25°C
V
STEP
= 100mV
OVERDRIVE = 20mV
+V
S
= V
CC
= 5V
V
EE
= –5V
RISING EDGE
(t
PDLH
)
5
FALLING EDGE
(t
PDHL
)
NA
25mV
P-P
5V
Response to 150MHz 25mV
P-P
Sine Wave Driving 10pF
20mV/DIV
7
6
OUT A
1V/DIV
0V
FET PROBES
V
CC
= 5V
V
EE
= –5V
+V
S
= 5V
V
CM
= 0V
2.5ns/DIV
4
1715 G18
3
0
10
20
40
30
OUTPUT LOAD CAPACITANCE (pF)
50
1715 G17
5
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