PSoC® Mixed-Signal Array
CY8C20334 and CY8C20434
Preliminary Data Sheet
Features
■
Low Power CapSense Block
❐
Configurable Capacitive Sensing Elements
❐
Supports Combination of CapSense Buttons,
Sliders, Touchpads and Proximity Sensors
■
Powerful Harvard Architecture Processor
❐
❐
❐
❐
M8C Processor Speeds Running up to 12 MHz
Low Power at High Speed
2.4V to 5.25V Operating Voltage
Commercial Temperature Range:
-20°C to +70°C
■
Complete Development Tools
❐
Free Development Tool (PSoC Designer™)
❐
Full-Featured, In-Circuit Emulator and
Programmer
❐
Full Speed Emulation
❐
Complex Breakpoint Structure
❐
128K Trace Memory
■
Precision, Programmable Clocking
❐
Internal ±5.0% 6/12 MHz Main Oscillator
❐
Internal Low Speed Oscillator at 32 kHz for
Watchdog and Sleep
■
Programmable Pin Configurations
❐
Pull Up, High Z, Open Drain, CMOS Drive
Modes on All GPIO
❐
5 mA Strong Drive Mode on Port 1
❐
Up to 28 Analog Inputs on GPIO
❐
Configurable Inputs on All GPIO
❐
Selectable, Regulated Digital IO on Port 1
-
- 3.0V, 20 mA Total Source Current
■
Versatile Analog Mux
❐
❐
❐
❐
Common Internal Analog Bus
Simultaneous Connection of IO Combinations
Comparator Noise Immunity
Low-Dropout Voltage Regulator for the Analog
Array
■
Additional System Resources
❐
Configurable Communication Speeds
-- I2C: Selectable to 50 kHz, 100 kHz or
400 kHz
-- SPI : Configurable between 46.9 kHz and
3 MHz
❐
❐
❐
❐
❐
I
2
C™ Slave
SPI Master and SPI Slave
Watchdog and Sleep Timers
Internal Voltage Reference
Integrated Supervisory Circuit
■
Flexible On-Chip Memory
❐
8K Flash Program Storage
50,000 Erase/Write Cycles
❐
512 Bytes SRAM Data Storage
❐
Partial Flash Updates
❐
Flexible Protection Modes
❐
Interrupt Controller
❐
In-System Serial Programming (ISSP™)
PSoC® Functional Overview
The PSoC family consists of many
Mixed-Signal Array with On-
Chip Controller
devices. These devices are designed to replace
multiple traditional MCU-based system components with one,
low cost single-chip programmable component. A PSoC device
includes configurable analog and digital blocks, as well as pro-
grammable interconnect. This architecture allows the user to
create customized peripheral configurations, to match the
requirements of each individual application. Additionally, a fast
CPU, Flash program memory, SRAM data memory, and config-
urable IO are included in a range of convenient pinouts.
The PSoC architecture for this device family, as illustrated on
the left, is comprised of three main areas: the Core, the System
Resources, and the CapSense Analog System. A common, ver-
satile bus allows connection between IO and the analog sys-
tem. Each CY8C20x34 PSoC device includes a dedicated
CapSense block that provides sensing and scanning control cir-
cuitry for capacitive sensing applications. Depending on the
PSoC package, up to 28 general purpose IO (GPIO) are also
included. The GPIO provide access to the MCU and analog
mux.
January 17, 2006
© Cypress Semiconductor Corp. 2005-2006 — Document No. 001-05356 Rev. *A
1
CY8C20x34 Preliminary Data Sheet
PSoC™ Overview
The PSoC Core
The PSoC Core is a powerful engine that supports a rich
instruction set. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers, and IMO (inter-
nal main oscillator) and ILO (internal low speed oscillator). The
CPU core, called the M8C, is a powerful processor with speeds
up to 12 MHz. The M8C is a two-MIPS, 8-bit Harvard architec-
ture microprocessor.
System Resources provide additional capability, such as a con-
figurable I2C slave/SPI master-slave communication interface
and various system resets supported by the M8C.
The Analog System is composed of the CapSense PSoC block
and an internal 1.8V analog reference, which together support
capacitive sensing of up to 28 inputs.
The Analog Multiplexer System
The Analog Mux Bus can connect to every GPIO pin. Pins can
be connected to the bus individually or in any combination. The
bus also connects to the analog system for analysis with the
CapSense block comparator.
Switch control logic enables selected pins to precharge continu-
ously under hardware control. This enables capacitive mea-
surement for applications such as touch sensing. Other
multiplexer applications include:
■
Complex capacitive sensing interfaces, such as sliders and
touchpads.
Chip-wide mux that allows analog input from any IO pin.
Crosspoint connection between any IO pin combinations.
■
■
The CapSense Analog System
The Analog System contains the capacitive sensing hardware.
Several hardware algorithms are supported. This hardware per-
forms capacitive sensing and scanning without requiring exter-
nal components. Capacitive sensing is configurable on each
GPIO pin. Scanning of enabled CapSense pins can be com-
pleted quickly and easily across multiple ports.
Additional System Resources
System Resources, some of which have been previously listed,
provide additional capability useful to complete systems. Addi-
tional resources include low voltage detection and power on
reset. Brief statements describing the merits of each system
resource are presented below.
■
The I2C slave/SPI master-slave module provides 50/100/400
kHz communication over two wires. SPI communication over
3 or 4 wires runs at speeds of 46.9 kHz to 3 MHz (lower for a
slower system clock).
Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
An internal 1.8V reference provides an absolute reference for
capacitive sensing.
The 5V maximum input, 3V fixed output, low-dropout regula-
tor (LDO) provides regulation for IOs. A register-controlled
bypass mode allows the user to disable the LDO.
■
IDAC
Analog Global Bus
■
■
Vr
Reference
Buffer
Cinternal
Com parator
Mux
Mux
Refs
Cap Sense Counters
CSCLK
IMO
CapSense
Clock Select
Relaxation
Oscillator
(RO)
Analog System Block Diagram
January 17, 2006
Document No. 001-05356 Rev. *A
2
CY8C20x34 Preliminary Data Sheet
PSoC™ Overview
Getting Started
The quickest path to understanding the PSoC silicon is by read-
ing this data sheet and using the PSoC Designer Integrated
Development Environment (IDE). This data sheet is an over-
view of the PSoC integrated circuit and presents specific pin,
register, and electrical specifications. For in-depth information,
along with detailed programming information, reference the
PSoC Mixed-Signal Array Technical Reference Manual,
which
can be found on
http://www.cypress.com/psoc.
For up-to-date Ordering, Packaging, and Electrical Specification
information, reference the latest PSoC device data sheets on
the web at
http://www.cypress.com.
Development Tools
PSoC Designer is a Microsoft
®
Windows-based, integrated
development environment for the Programmable System-on-
Chip (PSoC) devices. The PSoC Designer IDE and application
runs on Windows NT 4.0, Windows 2000, Windows Millennium
(Me), or Windows XP. (Reference the PSoC Designer Func-
tional Flow diagram below.)
PSoC Designer helps the customer to select an operating con-
figuration for the PSoC, write application code that uses the
PSoC, and debug the application. This system provides design
database management by project, an integrated debugger with
In-Circuit Emulator, in-system programming support, and the
CYASM macro assembler for the CPUs.
PSoC Designer also supports a high-level C language compiler
developed specifically for the devices in the family.
Development Kits
Development Kits are available from the following distributors:
Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store
contains development kits,
C
compilers, and all accessories for
PSoC development. Go to the Cypress Online Store web site at
http://www.cypress.com,
click the Online Store shopping cart
icon at the bottom of the web page, and click
PSoC (Program-
mable System-on-Chip)
to view a current list of available items.
PSoC
TM
Designer
Graphical Designer
Interface
Context
Sensitive
Help
Commands
Results
Technical Training
Free PSoC technical training is available for beginners and is
taught by a marketing or application engineer over the phone.
PSoC training classes cover designing, debugging, advanced
analog, as well as application-specific classes covering topics
such as PSoC and the LIN bus. Go to
http://www.cypress.com,
click on Design Support located on the left side of the web
page, and select Technical Training for more details.
Importable
Design
Database
Device
Database
Application
Database
Project
Database
User
Modules
Library
Consultants
Certified PSoC Consultants offer everything from technical
assistance to completed PSoC designs. To contact or become a
PSoC Consultant go to
http://www.cypress.com,
click on Design
Support located on the left side of the web page, and select
CYPros Consultants.
PSoC
TM
Designer
Core
Engine
PSoC
Configuration
Sheet
Manufacturing
Information
File
Technical Support
PSoC application engineers take pride in fast and accurate
response. They can be reached with a 4-hour guaranteed
response at
http://www.cypress.com/support/login.cfm.
Em ulation
Pod
In-Circuit
Em ulator
Device
Programmer
PSoC Designer Subsystems
Application Notes
A long list of application notes will assist you in every aspect of
your design effort. To view the PSoC application notes, go to
the
http://www.cypress.com
web site and select Application
Notes under the Design Resources list located in the center of
the web page. Application notes are sorted by date by default.
January 17, 2006
Document No. 001-05356 Rev. *A
3
CY8C20x34 Preliminary Data Sheet
PSoC™ Overview
PSoC Designer Software Subsystems
Device Editor
The device editor subsystem allows the user to select different
onboard analog and digital components called user modules
using the PSoC blocks. Examples of user modules are ADCs,
DACs, Amplifiers, and Filters.
The device editor also supports easy development of multiple
configurations and dynamic reconfiguration. Dynamic reconfig-
uration allows for changing configurations at run time.
PSoC Designer sets up power-on initialization tables for
selected PSoC block configurations and creates source code
for an application framework. The framework contains software
to operate the selected components and, if the project uses
more than one operating configuration, contains routines to
switch between different sets of PSoC block configurations at
run time. PSoC Designer can print out a configuration sheet for
a given project configuration for use during application pro-
gramming in conjunction with the Device Data Sheet. Once the
framework is generated, the user can add application-specific
code to flesh out the framework. It’s also possible to change the
selected components and regenerate the framework.
Debugger
The PSoC Designer Debugger subsystem provides hardware
in-circuit emulation, allowing the designer to test the program in
a physical system while providing an internal view of the PSoC
device. Debugger commands allow the designer to read the
program and read and write data memory, read and write IO
registers, read and write CPU registers, set and clear break-
points, and provide program run, halt, and step control. The
debugger also allows the designer to create a trace buffer of
registers and memory locations of interest.
Online Help System
The online help system displays online, context-sensitive help
for the user. Designed for procedural and quick reference, each
functional subsystem has its own context-sensitive help. This
system also provides tutorials and links to FAQs and an Online
Support Forum to aid the designer in getting started.
Hardware Tools
In-Circuit Emulator
Application Editor
In the Application Editor you can edit your C language and
Assembly language source code. You can also assemble, com-
pile, link, and build.
Assembler.
The macro assembler allows the assembly code
to be merged seamlessly with C code. The link libraries auto-
matically use absolute addressing or can be compiled in relative
mode, and linked with other software modules to get absolute
addressing.
C Language Compiler.
A C language compiler is available
that supports the PSoC family of devices. Even if you have
never worked in the C language before, the product quickly
allows you to create complete C programs for the PSoC family
devices.
The embedded, optimizing C compiler provides all the features
of C tailored to the PSoC architecture. It comes complete with
embedded libraries providing port and bus operations, standard
keypad and display support, and extended math functionality.
A low cost, high functionality ICE (In-Circuit Emulator) is avail-
able for development support. This hardware has the capability
to program single devices.
The emulator consists of a base unit that connects to the PC by
way of a USB port. The base unit is universal and will operate
with all PSoC devices. Emulation pods for each device family
are available separately. The emulation pod takes the place of
the PSoC device in the target board and performs full speed (24
MHz) operation.
January 17, 2006
Document No. 001-05356 Rev. *A
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CY8C20x34 Preliminary Data Sheet
PSoC™ Overview
Designing with User Modules
The development process for the PSoC device differs from that
of a traditional fixed function microprocessor. The configurable
analog and digital hardware blocks give the PSoC architecture
a unique flexibility that pays dividends in managing specification
change during development and by lowering inventory costs.
These configurable resources, called PSoC Blocks, have the
ability to implement a wide variety of user-selectable functions.
Each block has several registers that determine its function and
connectivity to other blocks, multiplexers, buses and to the IO
pins. Iterative development cycles permit you to adapt the hard-
ware as well as the software. This substantially lowers the risk
of having to select a different part to meet the final design
requirements.
To speed the development process, the PSoC Designer Inte-
grated Development Environment (IDE) provides a library of
pre-built, pre-tested hardware peripheral functions, called “User
Modules.” User modules make selecting and implementing
peripheral devices simple, and come in analog, digital, and
mixed signal varieties.
Each user module establishes the basic register settings that
implement the selected function. It also provides parameters
that allow you to tailor its precise configuration to your particular
application. For example, a Pulse Width Modulator User Mod-
ule configures one or more digital PSoC blocks, one for each 8
bits of resolution. The user module parameters permit you to
establish the pulse width and duty cycle. User modules also
provide tested software to cut your development time. The user
module application programming interface (API) provides high-
level functions to control and respond to hardware events at run
time. The API also provides optional interrupt service routines
that you can adapt as needed.
The API functions are documented in user module data sheets
that are viewed directly in the PSoC Designer IDE. These data
sheets explain the internal operation of the user module and
provide performance specifications. Each data sheet describes
the use of each user module parameter and documents the set-
ting of each register controlled by the user module.
The development process starts when you open a new project
and bring up the Device Editor, a graphical user interface (GUI)
for configuring the hardware. You pick the user modules you
need for your project and map them onto the PSoC blocks with
point-and-click simplicity. Next, you build signal chains by inter-
connecting user modules to each other and the IO pins. At this
stage, you also configure the clock source connections and
enter parameter values directly or by selecting values from
drop-down menus. When you are ready to test the hardware
configuration or move on to developing code for the project, you
perform the “Generate Application” step. This causes PSoC
Designer to generate source code that automatically configures
the device to your specification and provides the high-level user
module API functions.
Device Editor
User
Module
Selection
Placement
and
Parameter
-ization
Source
Code
Generator
Generate
Application
Application Editor
Project
Manager
Source
Code
Editor
Build
Manager
Build
All
Debugger
Interface
to ICE
Storage
Inspector
Event &
Breakpoint
Manager
User Module and Source Code Development Flows
The next step is to write your main program, and any sub-rou-
tines using PSoC Designer’s Application Editor subsystem.
The Application Editor includes a Project Manager that allows
you to open the project source code files (including all gener-
ated code files) from a hierarchal view. The source code editor
provides syntax coloring and advanced edit features for both C
and assembly language. File search capabilities include simple
string searches and recursive “grep-style” patterns. A single
mouse click invokes the Build Manager. It employs a profes-
sional-strength “makefile” system to automatically analyze all
file dependencies and run the compiler and assembler as nec-
essary. Project-level options control optimization strategies
used by the compiler and linker. Syntax errors are displayed in
a console window. Double clicking the error message takes you
directly to the offending line of source code. When all is correct,
the linker builds a HEX file image suitable for programming.
The last step in the development process takes place inside the
PSoC Designer’s Debugger subsystem. The Debugger down-
loads the HEX image to the In-Circuit Emulator (ICE) where it
runs at full speed. Debugger capabilities rival those of systems
costing many times more. In addition to traditional single-step,
run-to-breakpoint and watch-variable features, the Debugger
provides a large trace buffer and allows you define complex
breakpoint events that include monitoring address and data bus
values, memory locations and external signals.
January 17, 2006
Document No. 001-05356 Rev. *A
5
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