LTC1157
3.3V Dual Micropower
High-Side/Low-Side MOSFET Driver
FEATURES
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DESCRIPTIO
Allows Lowest Drop 3.3V Supply Switching
Operates on 3.3V or 5V Nominal Supplies
3 Microamps Standby Current
80 Microamps ON Current
Drives Low Cost N-Channel Power MOSFETs
No External Charge Pump Components
Controlled Switching ON and OFF Times
Compatible with 3.3V and 5V Logic Families
Available in 8-Pin SOIC
APPLICATI
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S
Notebook Computer Power Management
Palmtop Computer Power Management
P-Channel Switch Replacement
Battery Charging and Management
Mixed 5V and 3.3V Supply Switching
Stepper Motor and DC Motor Control
Cellular Telephones and Beepers
The LTC1157 dual 3.3V micropower MOSFET gate driver
makes it possible to switch either supply or ground
reference loads through a low R
DS(ON)
N-channel switch
(N-channel switches are required at 3.3V because P-
channel MOSFETs do not have guaranteed R
DS(ON)
with
V
GS
≤
3.3V). The LTC1157 internal charge pump boosts
the gate drive voltage 5.4V above the positive rail (8.7V
above ground), fully enhancing a logic level N-channel
switch for 3.3V high-side applications and a standard N-
channel switch for 3.3V low-side applications. The gate
drive voltage at 5V is typically 8.8V above supply (13.8V
above ground), so standard N-channel MOSFET switches
can be used for both high-side and low-side applications.
Micropower operation, with 3µA standby current and
80µA operating current, makes the LTC1157 well suited
for battery-powered applications.
The LTC1157 is available in both 8-pin DIP and SOIC.
TYPICAL APPLICATI
Ultra Low Voltage Drop 3.3V Dual High-Side Switch
12
3.3V
GATE VOLTAGE – SUPPLY VOLTAGE (V)
+
10µF
10
8
6
4
2
0
2.0 2.5
V
S
3.3V
LOGIC
IN1
LTC1157
IN2
GND
G2
G1
(8.7V)
(8.7V)
IRLR024
IRLR024
3.3V
LOAD
3.3V
LOAD
LTC1157 • TA01
U
Gate Voltage Above Supply
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
6.0
LTC1157 • TA02
UO
UO
1
LTC1157
ABSOLUTE
AXI U
RATI GS
Operating Temperature Range
LTC1157C............................................... 0°C to 70°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
Supply Voltage ........................................... – 0.3V to 7V
Any Input Voltage ............. (V
S
+ 0.3V) to (GND – 0.3V)
Any Output Voltage ............. (V
S
+ 12V) to (GND – 0.3V)
Current (Any Pin)................................................. 50mA
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC 1
GATE 1 2
GND 3
IN1 4
8 NC
7 GATE 2
6 V
S
5 IN2
ORDER PART
NUMBER
LTC1157CN8
N8 PACKAGE
8-LEAD PLASTIC DIP
T
JMAX
= 100°C,
θ
JA
= 130°C/ W
ELECTRICAL CHARACTERISTICS
SYMBOL
I
Q
PARAMETER
Quiescent Current OFF
Quiescent Current ON
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Gate Voltage Above Supply
V
S
= 2.7V to 5.5V, T
A
= 25°C, unless otherwise noted.
MIN
LTC1157C
TYP
3
80
180
q
q
CONDITIONS
V
S
= 3.3V, V
IN1
= V
IN2
= 0V (Note 1)
V
S
= 3.3V, V
IN
= 3.3V (Note 2)
V
S
= 5V, V
IN
= 5V (Note 2)
V
INH
V
INL
I
IN
C
IN
V
GATE
– V
S
0V
≤
V
IN
≤
V
S
V
S
= 3V
V
S
= 3.3V
V
S
= 5V
V
S
= 3.3V, C
GATE
= 1000pF
Time for V
GATE
> V
S
+ 1V
Time for V
GATE
> V
S
+ 2V
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
> V
S
+ 1V
Time for V
GATE
> V
S
+ 2V
V
S
= 3.3V, C
GATE
= 1000pF
Time for V
GATE
< 0.5V
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
< 0.5V
t
ON
Turn-ON Time
t
OFF
Turn-OFF Time
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
Quiescent current OFF is for both channels in OFF condition.
Note 2:
Quiescent current ON is per driver and is measured independently.
2
U
U
W
W W
U
W
TOP VIEW
NC 1
GATE 1 2
GND 3
IN1 4
8
7
6
5
NC
GATE 2
V
S
IN2
ORDER PART
NUMBER
LTC1157CS8
S8 PART MARKING
1157
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 100°C,
θ
JA
= 150°C/ W
MAX
10
160
400
15%
×
V
S
±1
UNITS
µA
µA
µA
V
V
µA
pF
V
V
V
µs
µs
µs
µs
µs
µs
70%
×
V
S
q
q
q
q
4.0
4.5
7.5
30
75
30
75
10
10
5
4.7
5.4
8.8
130
240
85
230
36
31
6.5
7.0
12.0
300
750
300
750
60
60
LTC1157
TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
12
10
V
IN1
= V
IN2
= 0V
T
A
= 25°C
SUPPLY CURRENT (µA)
500
400
300
200
100
0
6.0
GATE VOLTAGE – SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
8
6
4
2
0
2.0
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
Input Threshold Voltage
3.0
T
A
= 25°C
INPUT THRESHOLD VOLTAGE (V)
2.5
2.0
1.5
1.0
0.5
0
2.0 2.5
600
400
V
GS
= 2V
300
200
0
V
GS
= 5V
TURN-OFF TIME (µs)
TURN-ON TIME (µs)
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
Standby Supply Current
12
10
GATE DRIVE CURRENT (µA)
SUPPLY CURRENT (µA)
8
6
V
S
= 5V
4
2
0
0
10
40
30
50
20
TEMPERATURE (˚C)
60
70
V
S
= 3.3V
SUPPLY CURRENT (µA)
U W
5.5
LTC1157 • TPC01
LTC1157 • TPC04
LTC1157 • TPC07
Supply Current per Driver ON
600
ONE INPUT = ON
OTHER INPUT = OFF
T
A
= 25°C
12
10
8
6
4
2
0
Gate Voltage Above Supply
2.0 2.5
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
6.0
2.0
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
5.5
6.0
LTC1157 • TPC02
LTC1157 • TPC03
Turn-ON Time
1000
C
GATE
= 1000pF
800
50
40
30
20
10
0
6.0
60
Turn-OFF Time
C
GATE
= 1000pF
TIME FOR V
GATE
< 0.5V
V
GS
= 1V
2.0
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
5.5
6.0
2.0
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
5.5
6.0
LTC1157 • TPC05
LTC1157 • TPC06
Supply Current per Driver ON
300
250
Gate Drive Current
1000
T
A
= 25°C
100
200
V
S
= 5V
150
100
V
S
= 3.3V
50
0
0
10
40
30
50
20
TEMPERATURE (˚C)
60
70
10
V
S
= 5V
1
V
S
= 3.3V
0.1
0
2
4
6
8
GATE VOLTAGE ABOVE SUPPLY (V)
10
LTC1157 • TPC08
LTC1157 • TPC09
3
LTC1157
PI FU CTIO S
Input Pins:
The LTC1157 input pins are active high and
activate the charge pump circuitry when switched ON. The
LTC1157 logic inputs are high impedance CMOS gates
with ESD protection diodes to ground and supply and
therefore should not be forced beyond the power supply
rails.
Gate Drive Pins:
The gate drive pin is either driven to
ground when the switch is turned OFF or driven above the
supply rail when the switch is turned ON. This pin is a
relatively high impedance when driven above the rail (the
equivalent of a few hundred kΩ). Care should be taken to
minimize any loading of this pin by parasitic resistance to
ground or supply.
Supply Pin:
The supply pin of the LTC1157 should never
be forced below ground as this may result in permanent
damage to the device.
A 300Ω resistor should be inserted
in series with the ground pin if negative supply voltage
transients are anticipated.
OPERATIO
The LTC1157 is a dual micropower MOSFET driver de-
signed specifically for operation at 3.3V and 5V and
includes the following functional blocks:
3.3V Logic Compatible Inputs
The LTC1157 inputs have been designed to accommodate
a wide range of 3.3V and 5V logic families. Approximately
50mV of hysteresis is provided to ensure clean switching.
An ultra low standby current voltage regulator provides
continuous bias for the logic-to-CMOS converter. The
logic-to-CMOS converter output enables the rest of the
circuitry. In this way the power consumption is kept to an
absolute minimum in the standby mode.
BLOCK DIAGRA
INPUT
4
W
U
U
U
U
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
internal charge pump circuit which generates a gate volt-
age substantially higher than the power supply voltage.
The charge pump capacitors are included on-chip and
therefore no external components are required to generate
the gate drive.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions.
(One Channel)
V
S
LOW STANDBY
CURRENT
REGULATOR
HIGH
FREQUENCY
OSCILLATOR
CHARGE
PUMP
GATE
LOGIC-TO-CMOS
CONVERTER
VOLTAGE
REGULATOR
GATE
DISCHARGE
LOGIC
LTC1157 • BD
GND
LTC1157
APPLICATIO S I FOR ATIO
MOSFET Selection
The LTC1157 is designed to operate with both standard
and logic level N-channel MOSFET switches. The choice of
switch is determined primarily by the operating supply
voltage.
Logic Level MOSFET Switches at 3.3V
Logic level switches should be used with the LTC1157
when powered from 2.7V to 4V. Although there is some
variation among manufacturers, logic level MOSFET
switches are typically rated with V
GS
= 4V with a maximum
continuous V
GS
rating of
±10V.
R
DS(ON)
and maximum
V
DS
ratings are similar to standard MOSFETs and there is
generally little price differential. Logic level MOSFETs are
frequently designated by an “L” and are usually available
in surface mount packaging. Some logic level MOSFETs
are rated up to
±15V
and can be used in applications which
require operation over the entire 2.7V to 5.5V range.
Standard MOSFET Switches at 5V
Standard N-channel MOSFET switches should be used
with the LTC1157 when powered from 4V to 5.5V supply
as the built-in charge pump produces ample gate drive to
fully enhance these switches when powered from a 5V
nominal supply. Standard N-channel MOSFET switches
are rated with V
GS
= 10V and are generally restricted to a
maximum of
±20V.
Powering Large Capacitive Loads
Electrical subsystems in portable battery-powered equip-
ment are typically bypassed with large filter capacitors to
reduce supply transients and supply induced glitching. If
not properly powered however, these capacitors may
themselves become the source of supply glitching.
For example, if a 100µF capacitor is powered through a
switch with a slew rate of 0.1V/µs, the current during start-
up is:
I
START
= C(dV/dt)
= (100
×
10
– 6
) (1
×
10
5
)
= 10A
U
Obviously, this is too much current for the regulator (or
output capacitor) to supply and the output will glitch by as
much as a few volts.
The start-up current can be substantially reduced by
limiting the slew rate at the gate of an N-channel switch as
shown in Figure 1. The gate drive output of the LTC1157
V
IN
LT1129-3.3
3.3V
W
U U
+
3.3µF
V
S
ON/0FF
IN1
1/2 LTC1157
GND
G1
R1
100k
R2
1k
MTD3055EL
C1
0.1µF
+
C
LOAD
100µF
3.3V
LOAD
LTC1157 • TA02
Figure 1. Powering a Large Capacitive Load
is passed through a simple RC network, R1 and C1, which
substantially slows the slew rate of the MOSFET gate to
approximately 1.5
×
10
– 4
V/µs. Since the MOSFET is
operating as a source follower, the slew rate at the source
is essentially the same as that at the gate, reducing the
start-up current to approximately 15mA which is easily
managed by the system regulator. R2 is required to
eliminate the possibility of parasitic MOSFET oscillations
during switch transitions. Also, it is good practice to
isolate the gates of paralleled MOSFETs with 1k resistors
to decrease the possibility of interaction between switches.
Reverse Battery Protection
The LTC1157 can be protected against reverse battery
conditions by connecting a 300Ω resistor in series with
the ground pin. The resistor limits the supply current to
less than 12mA with – 3.6V applied. Since the LTC1157
draws very little current while in normal operation, the
drop across the ground resistor is minimal. The 3.3V
µP
(or control logic) can be protected by adding 10k resistors
in series with the input pins.
5
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