LTC1164-7
Low Power, Linear Phase
8th Order Lowpass Filter
FEATURES
s
s
s
s
s
s
s
s
DESCRIPTIO
Better Than Bessel Roll-Off
f
CUTOFF
up to 20kHz, Single 5V Supply
I
SUPPLY
= 2.5mA (Typ), Single 5V Supply
75dB THD + Noise with Single 5V Supply
Phase and Group Delay Response Fully Tested
Transient Response with No Ringing
Wide Dynamic Range
No External Components Needed
APPLICATI
s
s
s
S
The LTC1164-7 is a low power, clock-tunable monolithic
8th order lowpass filter with linear passband phase and
flat group delay. The amplitude response approximates a
maximally flat passband and exhibits steeper roll-off than
an equivalent 8th order Bessel filter. For instance, at twice
the cutoff frequency the filter attains 34dB attenuation
(vs12dB for Bessel), while at three times the cutoff fre-
quency the filter attains 68dB attenuation (vs 30dB for
Bessel). The cutoff frequency of the LTC1164-7 is tuned
via an external TTL or CMOS clock.
Low power is achieved without sacrificing dynamic range.
With single 5V supply, the S/N + THD is up to 75dB.
Optimum 91dB S/N is obtained with
±7.5V
supplies.
The clock-to-cutoff frequency ratio of the LTC1164-7 can
be set to 50:1 (pin 10 to V
+
) or 100:1 (pin 10 to V
–
).
When the filter operates at the clock-to-cutoff frequency
ratio of 50:1, the input is double-sampled to lower the risk
of aliasing.
The LTC1164-7 is pin-compatible with the LTC1064-X
series and LTC1264-7.
Data Communication Filters
Time Delay Networks
Phase Matched Filters
TYPICAL APPLICATI
1
V
IN
2
3
5V
4
5
6
7
LTC1164-7
10kHz Linear Phase Lowpass Filter
14
13
12
11
10
9
8
–5V
CLK = 500kHz
5V
V
OUT
0
–10
–20
GAIN (dB)
–30
–40
–50
–60
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED
BY A 0.1µF CAPACITOR CLOSE TO THE PACKAGE
AND ANY PRINTED CIRCUIT BOARD ASSEMBLY
SHOULD MAINTAIN A DISTANCE OF AT LEAST 0.2
INCHES BETWEEN ANY OUTPUT OR INPUT PIN AND
THE f
CLK
LINE.
1164-7 TA01
–70
–80
1
10
FREQUENCY (kHz)
U
Frequency Response
GAIN
150
140
130
DELAY
120
110
100
90
80
70
100
1164-7 TA02
UO
UO
DELAY (µs)
1
LTC1164-7
ABSOLUTE
AXI U
RATI GS
Operating Temperature Range
LTC1164-7C ...................................... – 40°C to 85°C
LTC1164-7M ................................... – 55°C to 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
Total Supply Voltage (V
+
to V
–
) ............................. 16V
Power Dissipation............................................. 400mW
Burn-In Voltage ...................................................... 16V
Voltage at Any Input ..... (V
–
– 0.3V)
≤
V
IN
≤
(V
+
+ 0.3V)
Storage Temperature Range ................ – 65°C to 150°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC
V
IN
GND
V
+
GND
LP6
CONNECT 1
1
2
3
4
5
6
7
14 CONNECT 2
13 NC
12
V
–
ORDER PART
NUMBER
LTC1164-7CN
LTC1164-7CJ
LTC1164-7MJ
11 f
CLK
10 50/100
9
8
V
OUT
NC
J PACKAGE
14-LEAD CERAMIC DIP
N PACKAGE
14-LEAD PLASTIC DIP
T
JMAX
= 150°C,
θ
JA
= 65°C/W (J)
T
JMAX
= 110°C,
θ
JA
= 65°C/W (N)
ELECTRICAL CHARACTERISTICS
PARAMETER
Passband Gain
Gain at 0.50 f
CUTOFF
(Note 3)
Gain at 0.75 f
CUTOFF
Gain at f
CUTOFF
Gain at 2.0 f
CUTOFF
Gain with f
CLK
= 20kHz
Gain with f
CLK
= 400kHz, V
S
=
±2.375V
Phase Factor (F )
Phase = 180° –
F
(f/f
C
)
(Note 1)
V
S
=
±7.5V,
R
L
= 10k, T
A
= 25°C, f
CUTOFF
= 8kHz or 4kHz, f
CLK
= 400kHz, TTL or CMOS level and all gain measurements are referenced
to passband gain, unless otherwise specified. (Maximum clock rise or fall time
≤
1µs)
CONDITIONS
0.1Hz
≤
f
≤
0.25 f
CUTOFF
f
TEST
= 2kHz, (f
CLK
/ f
C
) = 50:1 (Note 4)
f
TEST
= 4kHz, (f
CLK
/ f
C
) = 50:1
f
TEST
= 2kHz, (f
CLK
/ f
C
) = 100:1
f
TEST
= 6kHz, (f
CLK
/ f
C
) = 50:1
f
TEST
= 8kHz, (f
CLK
/ f
C
) = 50:1
f
TEST
= 4kHz, (f
CLK
/ f
C
) = 100:1
f
TEST
= 16kHz, (f
CLK
/ f
C
) = 50:1
f
TEST
= 8kHz, (f
CLK
/ f
C
) = 100:1
f
TEST
= 200Hz, (f
CLK
/ f
C
) = 100:1
f
TEST
= 4kHz, (f
CLK
/ f
C
) = 50:1
f
TEST
= 8kHz, (f
CLK
/ f
C
) = 50:1
0.1Hz
≤
f
≤
f
CUTOFF
(f
CLK
/ f
C
) = 50:1
(f
CLK
/ f
C
) = 100:1
(f
CLK
/ f
C
) = 50:1
(f
CLK
/ f
C
) = 100:1
(f
CLK
/ f
C
) = 50:1
(f
CLK
/ f
C
) = 100:1
(f
CLK
/ f
C
) = 50:1
(f
CLK
/ f
C
) = 100:1
MIN
q
q
q
q
q
q
q
q
Phase Nonlinearity
(Note 1)
2
U
U
W
W W
U
W
TOP VIEW
NC 1
V
IN
2
GND 3
V
+
4
GND 5
NC 6
LP6 7
CONNECT 1 8
16 CONNECT 2
15 NC
14 V
–
13 NC
12 f
CLK
11 50/100
10 NC
9
S PACKAGE
16-LEAD PLASTIC SOL
V
OUT
ORDER PART
NUMBER
LTC1164-7CS
T
JMAX
= 110°C,
θ
JA
= 85°C/W
TYP
– 0.10
– 0.20
– 0.65
–1.1
– 3.4
– 5.2
– 34
– 34
– 5.2
– 0.2
– 3.4
435
±
2
428
±
2
MAX
0.30
0.30
0.15
0.1
–1.9
– 2.5
– 30
– 30
– 2.5
0.2
– 2.5
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Deg
Deg
Deg
Deg
%
%
%
%
– 0.50
– 0.50
– 0.85
– 1.2
– 4.1
– 5.5
– 37
– 38
– 5.7
– 0.50
– 3.75
q
q
430
423
±1.0
±1.0
442
434
q
q
±
2.0
±
2.5
LTC1164-7
ELECTRICAL CHARACTERISTICS
PARAMETER
Group Delay (t
d
)
t
d
= (1/360)(f/f
C
)
(Note 2)
Group Delay Deviation
(Note 2)
V
S
=
±7.5V,
R
L
= 10k, T
A
= 25°C, f
CUTOFF
= 8kHz or 4kHz, f
CLK
= 400kHz, TTL or CMOS level and all gain measurements are referenced
to passband gain, unless otherwise specified. (Maximum clock rise or fall time
≤
1µs)
CONDITIONS
(f
CLK
/f
C
) = 50:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 100:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 50:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 100:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 50:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 100:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 50:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 100:1, f
≥
f
CUTOFF
(f
CLK
/f
C
) = 50:1
(f
CLK
/f
C
) = 100:1
V
S
= Single 5V (Pins 3 and 5 at 2V)
V
S
=
±5V
V
S
=
±7.5V
50:1,
±5V,
Input at GND
V
S
=
±2.5V
V
S
=
±5V
V
S
=
±7.5V
V
S
=
±2.375V
V
S
=
±5V
V
S
=
±7.5V
50:1, V
S
=
±5V
100:1, V
S
=
±5V
50:1, V
S
=
±5V
100:1, V
S
=
±5V
V
S
=
±2.375V,
T
A
= 25°C
V
S
=
±5V,
T
A
= 25°C
q
MIN
TYP
151.0
±
1
297.2
±
1
MAX
q
q
149.3
293.8
±1.0
±1.0
153.5
301.4
q
q
±2.0
±2.5
Input Frequency Range (Table 9)
Maximum f
CLK
Clock Feedthrough (f = f
CLK
)
Wideband Noise
(1Hz
≤
f < f
CLK
)
Input Impedance
Output DC Voltage Swing (Note 4)
q
q
35
±1.25
±3.70
±5.40
Output DC Offset
Output DC Offset TempCo
Power Supply Current
<f
CLK
<f
CLK
/2
1
1
1
100
95
±
5%
105
±
5%
115
±
5%
55
±1.4
±3.9
±6.1
±100
±100
±200
±200
2.5
4.5
7.0
90
±220
q
V
S
=
±7.5V,
T
A
= 25°C
q
Power Supply Range
The
q
denotes specifications which apply over the full operating temperature range.
Note 1:
Input frequencies, f, are linearly phase shifted through the filter as long as
f
≤
f
C
; f
C
= cutoff frequency.
Figure 1 curve shows the typical phase response of an LTC1164-7 operating at
f
CLK
= 400kHz, f
C
= 8kHz and it closely matches an ideal straight line. The phase
shift is described by: phase shift = 180° –
F
(f/f
C
); f
≤
f
C
.
F
is arbitrarily called the “phase factor” expressed in degrees. The phase factor
together with the specified deviation from the ideal straight line allows the
calculation of the phase at a given frequency. Example: The phase shift at 7kHz of
the LTC1164-7 shown in Figure 1 is: phase shift = 180° – 434° (7kHz/10kHz)
±
nonlinearity = –123.8°
±
1% or –123.9°
±
1.24°.
Note 2:
Group delay and group delay deviation are calculated from the measured
phase factor and phase deviation specifications.
Note 3:
The filter cutoff frequency is abbreviated as f
CUTOFF
or f
C
.
Note 4:
The AC swing is typically 11V
P-P
, 7V
P-P
, 2.8V
P-P
for
±7.5V, ±
5V,
±
2.5V
supply respectively. For more information refer to the THD + Noise vs Input graphs.
180
90
0
–90
±2.375
f
CLK
= 500kHz
(f
CLK
/f
C
) = 50:1
4.0
4.5
7.0
8.0
11.0
12.5
±8
UNITS
µs
µs
µs
µs
%
%
%
%
kHz
kHz
MHz
MHz
MHz
µV
RMS
µV
RMS
µV
RMS
µV
RMS
kΩ
V
V
V
mV
mV
µV/°C
µV/°C
mA
mA
mA
mA
mA
mA
V
PHASE (DEG)
–180
–270
–360
0
1
2
3 4 5 6 7
FREQUENCY (kHz)
8
9
10
1164-7 F01
Figure 1. Phase Response in the Passband (Note 1)
3
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
Gain vs Frequency
10
0
–10
–20
–30
437
70°C
25°C
436
0°C
438
V
S
= ±5V
(f
CLK
/f
C
) = 50:1
GAIN (dB)
–40
–50
–60
–70
–80
–90
–100
–110
0.1
V
S
= ±5V
f
CLK
= 500kHz
T
A
= 25°C
100:1
50:1
PHASE FACTOR
PHASE FACTOR
1
10
FREQUENCY (kHz)
Phase Factor vs f
CLK
(Min and
Max Representative Units)
438
V
S
= ±5V
(f
CLK
/f
C
) = 50:1
T
A
= 25°C
PHASE FACTOR
437
PHASE FACTOR
GAIN (dB)
436
435
434
433
0.25
0.5
f
CLK
(MHz)
0.75
Passband Gain and Phase
5
GAIN
180
0
GAIN (dB)
GAIN (dB)
–5
PHASE
V
S
= ±5V
f
CLK
= 50kHz
f
C
= 1kHz
(f
CLK
/f
C
) = 50:1
200
800
400
600
FREQUENCY (Hz)
1000
1164-7 G07
–10
–15
–20
4
U W
1264-7 G01
Phase Factor vs f
CLK
(Typical Unit)
436
435
434
433
432
431
430
429
428
427
Phase Factor vs f
CLK
(Typical Unit)
V
S
= ±5V
(f
CLK
/f
C
) = 100:1
25°C
70°C
0°C
100
435
0.25
0.5
f
CLK
(MHz)
0.75
1.0
1164-7 G02
426
0.25
0.5
f
CLK
(MHz)
0.75
1.0
1164-7 G03
Phase Factor vs f
CLK
(Min and
Max Representative Units)
438
V
S
= SINGLE 5V
PINS 3, 5 AT 2V
(f
CLK
/f
C
) = 50:1
T
A
= 25°C
10
0
–10
–20
–30
–40
–50
–60
Gain vs Frequency
437
436
435
434
–70
–80
V
S
= SINGLE 5V
f
CLK
= 1MHz
f
C
= 10kHz
(f
CLK
/f
C
) = 50:1
T
A
= 25°C
1
10
FREQUENCY (kHz)
100
1164-7 G06
1.0
1164-7 G04
433
0.25
–90
0.5
f
CLK
(MHz)
0.75
1.0
1164-7 G05
Passband Gain and Phase
5
180
90
0
PHASE (DEG)
GAIN
90
PHASE (DEG)
0
–5
PHASE
0
–90
–10
V
S
= ±5V
f
CLK
= 100kHz
f
C
= 1kHz
(f
CLK
/f
C
) = 100:1
200
–90
–180
–15
–180
–270
–20
–270
800
400
600
FREQUENCY (Hz)
1000
1164-7 G08
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
Passband Gain vs Frequency
and f
CLK
5
4
3
2
GAIN (dB)
V
S
= ±5V
f
C
= 5kHz
(f
CLK
/f
C
) = 50:1
T
A
= 25°C
A. f
CLK
= 250kHz
B. f
CLK
= 500kHz
C. f
CLK
= 750kHz
D. f
CLK
= 1000kHz
GAIN (dB)
GAIN (dB)
1
0
–1
–2
–3
–4
–5
1
10
FREQUENCY (kHz)
100
1164-7 G09
A
B
C D
Passband Gain vs Frequency
and f
CLK
5
4
3
2
V
S
= SINGLE 5V
(f
CLK
/f
C
) = 50:1
T
A
= 85°C
A. f
CLK
= 250kHz
B. f
CLK
= 500kHz
C. f
CLK
= 750kHz
D. f
CLK
= 1000kHz
250
DELAY (µs)
GAIN (dB)
1
0
–1
–2
–3
–4
–5
1
10
FREQUENCY (kHz)
100
1164-7 G12
150
B
100
C
D
50
DELAY (µs)
A
B
C D
THD + Noise vs Frequency
– 40
–45
– 50
THD + NOISE (dB)
– 40
THD + NOISE (dB)
– 60
–65
–70
–75
–80
–85
–90
1
– 60
–65
– 70
–75
–80
–85
–90
THD + NOISE (dB)
– 55
V
S
= ±7.5V
V
IN
= 2V
RMS
f
CLK
= 500kHz
(f
CLK
/f
C
) = 50:1
(5 REPRESENTA-
TIVE UNITS)
5
FREQUENCY (kHz)
U W
10
1164-7 G15
Passband Gain vs Frequency
and f
CLK
5
4
3
2
1
0
–1
–2
–3
–4
–5
1
10
FREQUENCY (kHz)
100
1164-7 G10
Passband Gain vs Frequency
and f
CLK
5
4
3
2
1
0
–1
–2
A
B C D
V
S
= ±5V
(f
CLK
/f
C
) = 100:1
T
A
= 25°C
A. f
CLK
= 250kHz
B. f
CLK
= 500kHz
C. f
CLK
= 750kHz
D. f
CLK
= 1000kHz
V
S
= ±5V
(f
CLK
/f
C
) = 50:1
T
A
= 85°C
A. f
CLK
= 250kHz
B. f
CLK
= 500kHz
C. f
CLK
= 750kHz
D. f
CLK
= 1000kHz
A
B
C
D
–3
–4
–5
1
10
FREQUENCY (kHz)
100
1164-7 G11
Delay vs Frequency and f
CLK
500
A
200
V
S
= ±5V
(f
CLK
/f
C
) = 50:1
T
A
= 25°C
A. f
CLK
= 250kHz
B. f
CLK
= 500kHz
C. f
CLK
= 750kHz
D. f
CLK
= 1000kHz
Delay vs Frequency and f
CLK
450
400
350
300
250
200
150
100
50
B
C
D
A
V
S
= ±5V
(f
CLK
/f
C
) = 100:1
T
A
= 25°C
A. f
CLK
= 250kHz
B. f
CLK
= 500kHz
C. f
CLK
= 750kHz
D. f
CLK
= 1000kHz
0
2
4
6
8 10 12 14 16 18 20
FREQUENCY (kHz)
22
0
1
2
3
4 5 6 7 8
FREQUENCY (kHz)
9
10 11
1264-7 G14
1264-7 G13
THD + Noise vs Frequency
– 40
V
S
= ±5V
V
IN
= 1V
RMS
f
CLK
= 500kHz
(f
CLK
/f
C
) = 50:1
(5 REPRESENTA-
TIVE UNITS)
–45
– 50
– 55
– 60
–65
– 70
–75
–80
–85
1
5
FREQUENCY (kHz)
10
1164-7 G16
THD + Noise vs Frequency
V
S
= ±7.5V
V
IN
= 2V
RMS
f
CLK
= 500kHz
(f
CLK
/f
C
) = 100:1
(5 REPRESENTA-
TIVE UNITS)
–45
– 50
– 55
–90
1
2
3
FREQUENCY (kHz)
4
5
1164-7 G17
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
