UV PLD, 52ns, 192-Cell, CMOS, CQCC84, WINDOWED, LCC-84
| 参数名称 | 属性值 |
| 是否Rohs认证 | 不符合 |
| 厂商名称 | Cypress(赛普拉斯) |
| 零件包装代码 | LCC |
| 包装说明 | WINDOWED, LCC-84 |
| 针数 | 84 |
| Reach Compliance Code | not_compliant |
| 其他特性 | LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| 最大时钟频率 | 34.5 MHz |
| 系统内可编程 | NO |
| JESD-30 代码 | S-CQCC-J84 |
| JESD-609代码 | e0 |
| JTAG BST | NO |
| 长度 | 29.21 mm |
| 专用输入次数 | 7 |
| I/O 线路数量 | 64 |
| 宏单元数 | 192 |
| 端子数量 | 84 |
| 最高工作温度 | 70 °C |
| 最低工作温度 | |
| 组织 | 7 DEDICATED INPUTS, 64 I/O |
| 输出函数 | MACROCELL |
| 封装主体材料 | CERAMIC, METAL-SEALED COFIRED |
| 封装代码 | WQCCJ |
| 封装等效代码 | LDCC84,1.2SQ |
| 封装形状 | SQUARE |
| 封装形式 | CHIP CARRIER, WINDOW |
| 峰值回流温度（摄氏度） | 225 |
| 电源 | 5 V |
| 可编程逻辑类型 | UV PLD |
| 传播延迟 | 52 ns |
| 认证状态 | Not Qualified |
| 座面最大高度 | 5.08 mm |
| 最大供电电压 | 5.25 V |
| 最小供电电压 | 4.75 V |
| 标称供电电压 | 5 V |
| 表面贴装 | YES |
| 技术 | CMOS |
| 温度等级 | COMMERCIAL |
| 端子面层 | Tin/Lead (Sn/Pb) |
| 端子形式 | J BEND |
| 端子节距 | 1.27 mm |
| 端子位置 | QUAD |
| 处于峰值回流温度下的最长时间 | 30 |
| 宽度 | 29.21 mm |
| Base Number Matches | 1 |
| CY7C341-25HC | 5962-9314401MUX | 5962-8946805YA | 5962-8946805XC | |
|---|---|---|---|---|
| 描述 | UV PLD, 52ns, 192-Cell, CMOS, CQCC84, WINDOWED, LCC-84 | UV PLD, 75ns, CMOS, CQCC84, CERAMIC, LCC-84 | UV PLD, 33ns, 128-Cell, CMOS, CPGA68, WINDOWED, CERAMIC, PGA-68 | UV PLD, 33ns, 128-Cell, CMOS, CPGA68, CERAMIC, PGA-68 |
| 零件包装代码 | LCC | LCC | PGA | PGA |
| 包装说明 | WINDOWED, LCC-84 | QCCJ, | WINDOWED, CERAMIC, PGA-68 | PGA, PGA68,11X11 |
| 针数 | 84 | 84 | 68 | 68 |
| Reach Compliance Code | not_compliant | unknown | not_compliant | unknown |
| 最大时钟频率 | 34.5 MHz | 22.2 MHz | 50 MHz | 50 MHz |
| JESD-30 代码 | S-CQCC-J84 | S-GQCC-J84 | S-CPGA-P68 | S-CPGA-P68 |
| 长度 | 29.21 mm | 29.21 mm | 27.9527 mm | 27.9527 mm |
| 专用输入次数 | 7 | 19 | 7 | 7 |
| I/O 线路数量 | 64 | 48 | 52 | 52 |
| 端子数量 | 84 | 84 | 68 | 68 |
| 最高工作温度 | 70 °C | 125 °C | 125 °C | 125 °C |
| 最低工作温度 | - | -55 °C | -55 °C | -55 °C |
| 组织 | 7 DEDICATED INPUTS, 64 I/O | 19 DEDICATED INPUTS, 48 I/O | 7 DEDICATED INPUTS, 52 I/O | 7 DEDICATED INPUTS, 52 I/O |
| 输出函数 | MACROCELL | MACROCELL | MACROCELL | MACROCELL |
| 封装主体材料 | CERAMIC, METAL-SEALED COFIRED | CERAMIC, GLASS-SEALED | CERAMIC, METAL-SEALED COFIRED | CERAMIC, METAL-SEALED COFIRED |
| 封装代码 | WQCCJ | QCCJ | WPGA | PGA |
| 封装形状 | SQUARE | SQUARE | SQUARE | SQUARE |
| 封装形式 | CHIP CARRIER, WINDOW | CHIP CARRIER | GRID ARRAY, WINDOW | GRID ARRAY |
| 可编程逻辑类型 | UV PLD | UV PLD | UV PLD | UV PLD |
| 传播延迟 | 52 ns | 75 ns | 33 ns | 33 ns |
| 认证状态 | Not Qualified | Not Qualified | Not Qualified | Not Qualified |
| 座面最大高度 | 5.08 mm | 5.08 mm | 5.08 mm | 5.08 mm |
| 最大供电电压 | 5.25 V | 5.5 V | 5.5 V | 5.5 V |
| 最小供电电压 | 4.75 V | 4.5 V | 4.5 V | 4.5 V |
| 标称供电电压 | 5 V | 5 V | 5 V | 5 V |
| 表面贴装 | YES | YES | NO | NO |
| 技术 | CMOS | CMOS | CMOS | CMOS |
| 温度等级 | COMMERCIAL | MILITARY | MILITARY | MILITARY |
| 端子形式 | J BEND | J BEND | PIN/PEG | PIN/PEG |
| 端子节距 | 1.27 mm | 1.27 mm | 2.54 mm | 2.54 mm |
| 端子位置 | QUAD | QUAD | PERPENDICULAR | PERPENDICULAR |
| 宽度 | 29.21 mm | 29.21 mm | 27.9527 mm | 27.9527 mm |
| Base Number Matches | 1 | 1 | 1 | 1 |
| 厂商名称 | Cypress(赛普拉斯) | - | Cypress(赛普拉斯) | Cypress(赛普拉斯) |
| 其他特性 | LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK | - | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| 系统内可编程 | NO | - | NO | NO |
| JESD-609代码 | e0 | - | e0 | e4 |
| JTAG BST | NO | - | NO | NO |
| 宏单元数 | 192 | - | 128 | 128 |
| 封装等效代码 | LDCC84,1.2SQ | - | LDCC68,1.0SQ | PGA68,11X11 |
| 电源 | 5 V | - | 5 V | 5 V |
| 端子面层 | Tin/Lead (Sn/Pb) | - | Tin/Lead (Sn/Pb) - hot dipped | GOLD |
| ECCN代码 | - | 3A001.A.2.C | 3A001.A.2.C | 3A001.A.2.C |
| 筛选级别 | - | MIL-STD-883 Class B | 38535Q/M;38534H;883B | MIL-STD-883 |
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