Micropower, Low-Jitter, 1Hz - 1MHz Programmable Super TCXO
Features
Applications
2
1 Hz to 1 MHz ±5 ppm all-inclusive frequency stability
Factory programmable output frequency
World’s smallest TCXO Footprint: 1.2 mm
- 1.5 x 0.8 mm CSP
- No external bypass cap required
Health and wellness monitors
Smart pens
ULP input devices
Proprietary wireless
Sensor interface
Improved stability reduces system power with fewer network
timekeeping updates
Ultra-low power: 8 µA (100 kHz)
Supply voltage: 1.8V ±10%
Operating temperature ranges: -20°C to +70°C, -40°C to +85°C
Pb-free, RoHS and REACH compliant
Electrical Characteristics
Conditions: Min/Max limits are over temperature, Vdd = 1.8V ±10%, unless otherwise stated. Typicals are at 25°C and Vdd = 1.8V.
Parameter
Output Frequency
Total Frequency Stability
[1]
F_stab
Allan Deviation
First Year Frequency Aging
AD
F_aging
Symbol
Fout
Min.
1
-5
-20
1e-8
±1
Typ.
Max.
1M
5
20
4e-8
ppm
Jitter Performance
Integrated Phase Jitter
Period Jitter
Peak-to-Peak Period Jitter
IPJ
PJ
PJ
p-p
1.8
2.5
20
2.5
4
35
ns
RMS
ns
RMS
ns
p-p
Cycles = 10,000, f = 100kHz. Per JEDEC standard 65B
F
OUT
> 1 kHz. Integration bandwidth = 100 Hz to F
OUT
/2.
Inclusive of 50 mV peak-to-peak sinusoidal noise on Vdd. Noise
frequency 100 Hz to 20 MHz.
Unit
Hz
ppm
ppm
All inclusive, Stability code: E
All inclusive, Stability code: 1
1 second averaging time
T
A
= 25°C, Vdd = 1.8V
Condition
Frequency and Stability
Supply Voltage and Current Consumption
Operating Supply Voltage
Vdd
1.62
1.8
2
4.5
Supply Current
Idd
8
20
Start-up Time at Power-up
t_start
300
ms
µA
1.98
V
F
OUT
= 1 Hz
F
OUT
= 33 kHz
F
OUT
= 100 kHz
F
OUT
= 1 MHz
Measured when supply reaches 90% of final Vdd to the first output
pulse.
“C” ordering code
“I” ordering code
Operating Temperature Range
-20
Operating Temperature Range
Op_Temp
-40
70
85
°C
°C
LVCMOS Output
Output Rise/Fall Time
Output Clock Duty Cycle
Output Voltage High
Output Voltage Low
tr, tf
DC
VOH
VOL
45
90%
10%
9
20
55
ns
%
Vdd
Vdd
I
OH
= -1
μA
I
OL
= 1 μA
10-90% (Vdd), 15 pF Load.
Note:
1. Relative to 32.768 kHz, includes initial tolerance, over temp stability, 3x reflow, Vdd range, board-level underfill, and 20% load variation. Tested with Agilent
53132A frequency counter. Measured with 100 ms gate time for accurate frequency measurement.
SiTime Corporation
Rev 0.5
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised March 10, 2016
SiT1576
1.2mm
2
Micropower, Low-Jitter, 1Hz - 1MHz Programmable Super TCXO
The Smart Timing Choice
Pin Configuration
CSP
Pin
1
2
3
4
Symbol
GND
CLK Out
Vdd
GND
I/O
Internal Test
OUT
Power Supply
Power Supply
Ground
Connect to ground.
Oscillator clock output.
1.8V ±10% power supply. Under normal operating conditions, Vdd does not require external
bypass/decoupling capacitor(s). SiT1576 includes on-chip filtering capacitors.
Connect to ground.
Functionality
CSP Package (Top View)
GND
1
4
GND
CLK Out
2
3
Vdd
Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of
the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameters
Continuous Power Supply Voltage Range (Vdd)
Continuous Maximum Operating Temperature Range
Short Duration Maximum Operating Temperature Range
Human Body Model (HBM) ESD Protection
Charge-Device Model (CDM) ESD Protection
Machine Model (MM) ESD Protection
Latch-up Tolerance
Mechanical Shock Resistance
Mechanical Vibration Resistance
1508 CSP Junction Temperature
Storage Temperature
Mil 883, Method 2002
Mil 883, Method 2007
≤ 30
minutes
JESD22-A114
JESD22-C101
JESD22-A115
JESD78 Compliant
20,000
70
150
-65 to 150
g
g
°C
°C
Test Conditions
Value
-0.5 to 4.0
105
125
2000
750
300
Unit
V
°C
°C
V
V
V
System Block Diagram
MEMS Resonator
GND
Control
Regulators
Vdd
Temp
Control
Temp-to-Digital
Prog
Prog
NVM
NC
Sustaining
Amp
Ultra-low
Power
Frac-n
PLL
Divider
Driver
CLK Out
Figure 1. SiT1576 Block Diagram
Rev. 0.5
Page 2 of 6
www.sitime.com
SiT1576
1.2mm
2
Micropower, Low-Jitter, 1Hz - 1MHz Programmable Super TCXO
The Smart Timing Choice
Description
SiT1576 is an ultra-small and ultra-low power Factory
programmable TCXO with an output frequency range
between 1 Hz to 1 MHz. SiTime’s silicon MEMS technology
enables the first 1 Hz - 1 MHz TCXO in the world’s smallest
footprint and chip-scale packaging (CSP). Typical supply
current is 4.5 µA (33 kHz) under no load condition.
SiTime's MEMS oscillator consists of a MEMS resonator and
a programmable analog circuit. SiT1576 MEMS resonator is
built with SiTime’s unique MEMS First™ process. A key
manufacturing step is EpiSeal™ during which the MEMS
resonator is annealed with temperatures over 1000°C.
EpiSeal creates an extremely strong, clean, vacuum
chamber that encapsulates the MEMS resonator and
ensures the best performance and reliability. During EpiSeal,
a poly silicon cap is grown on top of the resonator cavity,
which eliminates the need for additional cap wafers or other
exotic packaging. As a result, SiTime’s MEMS resonator die
can be used like any other semiconductor die. One unique
result of SiTime’s MEMS First and EpiSeal manufacturing
processes is the capability to integrate SiTime’s MEMS die
with a SOC, ASIC, micropro- cessor or analog die within a
package to eliminate external timing components and
provide a highly integrated, smaller, cheaper solution to the
customer.
TCXO Frequency Stability
SiT1576 is factory calibrated (trimmed) over multiple
temperature points to guarantee extremely tight stability over
temperature. Unlike quartz crystals that have a classic tuning
fork parabola temperature curve with a 25°C turnover point
with a 0.04 ppm/°C2 temperature coefficient, the SiT1576
temperature coefficient is calibrated and corrected over
temperature with an active temperature correction circuit. The
result is a 32 kHz TCXO with extremely tight frequency
variation over the -40°C to +85°C temperature range.
When measuring the output frequency of SiT1576 with a
frequency counter, it is important to make sure the counter's
gate time is >100 ms. Shorter gate times may lead to
inaccurate measurements.
Dynamic Temperature Frequency Response
Dynamic Temperature Frequency Response is the rate of
frequency change during temperature ramps. This is an
important performance metric when the oscillator is mounted
near a high power component (e.g. SoC or power
management) that may rapidly change the temperature of
surrounding components.
For moderate temperature ramp rates (< 2°C/sec), the
dynamic response is primarily determined by the steady-state
frequency vs. temperature of the device. The best dynamic
response is obtained from parts which have been trimmed to
be flat in frequency over temperature.
For high temperature ramp rates (>5°C/sec), the latency in the
temperature compensation loop contributes a larger frequency
error, which is dependent on the temperature compensation
update rate. This part achieves excellent performance at 3Hz
update rate. This device family supports faster update rates
for further reducing dynamic frequency error at the expense of
slightly increased current consumption.
Rev. 0.5
Page 3 of 6
www.sitime.com
SiT1576
1.2mm
2
Micropower, Low-Jitter, 1Hz - 1MHz Programmable Super TCXO
The Smart Timing Choice
Typical Operating Curves
(T
A
= 25°C, Vdd = 1.8V, unless otherwise stated)
Frequency Stability over Temperature
(Post Reflow)
Start-up and Steady-State Current Profile
Internal Caps Charging
Logic Start-up
NVM Read
OSC Start-up
Temperature
Compensation (13 µA)
Steady State
4.5
350ms
33 kHz
Power Supply Noise Rejection
(PSNR)
F
OUT
= 33 kHz
No Vdd bypass
10 nF Vdd bypass
Rev. 0.5
Page 4 of 6
www.sitime.com
SiT1576
1.2mm
2
Micropower, Low-Jitter, 1Hz - 1MHz Programmable Super TCXO
The Smart Timing Choice
Dynamic Frequency Response for Moderate Temperature Ramps
Frequency accuracy under a moderate temperature ramp up to 2°C/sec is limited by the TCXO’s trimmed accuracy of the
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