PD 9.1663
PRELIMINARY
l
l
l
l
l
l
IRFR/U9310
HEXFET
®
Power MOSFET
D
P-Channel
Surface Mount (IRFR9310)
Straight Lead (IRFU9310)
Advanced Process Technology
Fast Switching
Fully Avalanche Rated
V
DSS
= -400V
G
S
R
DS(on)
= 7.0Ω
I
D
= -1.8A
Description
Third Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D-Pak is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D -P a k
T O -2 52 A A
I-P a k
TO -2 5 1 A A
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ -10V
Continuous Drain Current, V
GS
@ -10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
-1.8
-1.1
-7.2
50
0.40
± 20
92
-1.8
5.0
-24
-55 to + 150
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount)**
Junction-to-Ambient
Typ.
–––
–––
–––
Max.
2.5
50
110
Units
°C/W
7/30/97
IRFR/U9310
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
-400
–––
–––
-2.0
0.91
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.41
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
11
10
25
24
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= -250µA
––– V/°C Reference to 25°C, I
D
= -1mA
7.0
Ω
V
GS
= -10V, I
D
= -1.1A
-4.0
V
V
DS
= V
GS
, I
D
= -250µA
–––
S
V
DS
= -50V, I
D
= -1.1A
-100
V
DS
= -400V, V
GS
= 0V
µA
-500
V
DS
= -320V, V
GS
= 0V, T
J
= 125°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
13
I
D
= -1.1A
3.2
nC V
DS
= -320V
5.0
V
GS
= -10V, See Fig. 6 and 13
–––
V
DD
= -200V
–––
I
D
= -1.1A
ns
–––
R
G
= 21Ω
–––
R
D
= 180Ω, See Fig. 10
D
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
–––
7.5
and center of die contact
S
270 –––
V
GS
= 0V
50 –––
pF
V
DS
= -25V
8.0 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -1.8
showing the
A
G
integral reverse
––– ––– -7.2
p-n junction diode.
S
––– ––– -4.0
V
T
J
= 25°C, I
S
= -1.1A, V
GS
= 0V
––– 170 260
ns
T
J
= 25°C, I
F
= -1.1A
––– 640 960
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
J
= 25°C, L = 57mH
R
G
= 25Ω, I
AS
= -1.8A. (See Figure 12)
I
SD
≤
-1.1A, di/dt
≤
450A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
150°C
Pulse width
≤
300µs; duty cycle
≤
2%.
This is applied for I-PAK, L
S
of D-PAK is measured between
lead and center of die contact
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
IRFR/U9310
10
TOP
-I
D
, Drain-to-Source Current (A)
BOTTOM
-I
D
, Drain-to-Source Current (A)
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
10
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
TOP
1
1
-4.5V
-4.5V
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
-V
DS
, Drain-to-Source Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
10
2.5
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= -1.8A
-I
D
, Drain-to-Source Current (A)
T
J
= 25
°
C
T
J
= 150
°
C
1
2.0
1.5
1.0
0.5
0.1
4
5
6
7
V DS = -50V
20µs PULSE WIDTH
8
9
10
0.0
-60 -40 -20
V
GS
= -10V
0
20
40
60
80 100 120 140 160
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRFR/U9310
500
-V
GS
, Gate-to-Source Voltage (V)
400
V
GS
C
iss
C
rss
C
oss
= 0V,
f = 1MHz
= C
gs
+ C
gd ,
C
ds
SHORTED
= C
gd
= C
ds
+ C
gd
20
I
D
= -1.1A
V
DS
= -320V
V
DS
= -200V
V
DS
= -80V
16
C, Capacitance (pF)
300
Ciss
12
200
8
Coss
100
4
Crss
0
1
10
100
0
0
4
8
FOR TEST CIRCUIT
SEE FIGURE 13
12
16
-V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
10
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
-I
SD
, Reverse Drain Current (A)
-I
D
, Drain Current (A)
I
10
10us
T
J
= 150
°
C
1
100us
1
1ms
T = 25
°
C
J
0.1
1.0
V
GS
= 0 V
2.0
3.0
4.0
5.0
0.1
T
C
= 25 °C
T
J
= 150 °C
Single Pulse
10
100
10ms
1000
-V
SD
,Source-to-Drain Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRFR/U9310
2.0
V
DS
V
GS
1.6
R
D
D.U.T.
+
-I
D
, Drain Current (A)
1.2
-10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
0.8
Fig 10a.
Switching Time Test Circuit
0.4
V
GS
10%
t
d(on)
t
r
t
d(off)
t
f
0.0
25
50
75
100
125
150
T
C
, Case Temperature
( °C)
90%
V
DS
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10
Fig 10b.
Switching Time Waveforms
Thermal Response (Z
thJC
)
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.01
0.00001
0.0001
0.001
0.01
0.1
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
-
R
G
V
DD
1
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