PD -
95706D
IRFB3307PbF
IRFS3307PbF
IRFSL3307PbF
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
HEXFET
®
Power MOSFET
D
G
S
V
DSS
R
DS(on)
typ.
max.
I
D
75V
5.0m
:
6.3m
:
120A
S
D
G
TO-220AB
IRFB3307PbF
S
D
G
D
2
Pak
IRFS3307PbF
S
D
G
TO-262
IRFSL3307PbF
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
120
84
d
l
1.3
l
200
± 20
-55 to + 175
300
10lb in (1.1N m)
270
See Fig. 14, 15, 16a, 16b
510
l
l
Units
A
W
W/°C
V
°C
x
x
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Ã
e
g
mJ
A
mJ
Thermal Resistance
Symbol
R
JC
R
CS
R
JA
R
JA
Junction-to-Case
Case-to-Sink, Flat Greased Surface , TO-220
Junction-to-Ambient, TO-220
Junction-to-Ambient (PCB Mount) , D
2
Pak
k
Parameter
Typ.
–––
0.50
–––
–––
Max.
0.61
–––
62
40
l
Units
°C/W
k
jk
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1
01/20/12
IRFB/S/SL3307PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
V
(BR)DSS
/T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Input Resistance
Min. Typ. Max. Units
75
––– –––
––– 0.069 –––
–––
5.0
6.3
2.0
–––
4.0
––– –––
20
––– ––– 250
––– ––– 200
––– ––– -200
–––
1.5
–––
V
V/°C
m
V
μA
nA
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 75A
V
DS
= V
GS
, I
D
= 150μA
V
DS
= 75V, V
GS
= 0V
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
f = 1MHz, open drain
g
d
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
98
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
120
35
46
26
120
51
63
5150
460
250
570
700
–––
180
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 50V, I
D
= 75A
I
D
= 75A
V
DS
= 60V
V
GS
= 10V
V
DD
= 48V
I
D
= 75A
R
G
= 3.9
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V , See Fig.11
V
GS
= 0V, V
DS
= 0V to 60V , See Fig. 5
ns
g
g
pF
h
i
h
Diode Characteristics
Symbol
I
S
I
SM
V
SD
dv/dt
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Peak Diode Recovery
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
130
Conditions
MOSFET symbol
D
A
Ãd
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
showing the
G
––– ––– 510
A integral reverse
S
p-n junction diode.
––– –––
1.3
V T
J
= 25°C, I
S
= 75A, V
GS
= 0V
–––
11
––– V/ns T
J
= 175°C, I
S
= 75A, V
DS
= 75V
–––
38
57
ns T
J
= 25°C
V
R
= 64V,
–––
46
69
T
J
= 125°C
I
F
= 75A
di/dt = 100A/μs
–––
65
98
nC T
J
= 25°C
–––
86
130
T
J
= 125°C
–––
2.8
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
f
g
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 75A.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.096mH
R
G
= 25, I
AS
= 75A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
75A, di/dt
530A/μs, V
DD
V
(BR)DSS
, T
J
175°C.
Pulse width
400μs; duty cycle
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended
footprint and soldering techniques refer to application note #AN-994.
R
is measured at T
J
approximately 90°C.
R
JC
(end of life) for D
2
Pak and TO-262 = 0.75°C/W. Note: This is the
maximum measured value after 1000 temperature cycles from -55 to 150°C
and is accounted for by the physical wearout of the die attach medium.
2
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IRFB/S/SL3307PbF
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
10
BOTTOM
1
4.5V
10
4.5V
0.1
60μs PULSE WIDTH
0.01
0.1
1
Tj = 25°C
10
1
100
1000
0.1
1
60μs PULSE WIDTH
Tj = 175°C
10
100
1000
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
2.5
Fig 2.
Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current
)
ID = 75A
VGS = 10V
2.0
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
60μs
PULSE WIDTH
0.1
2
4
6
8
10
1.5
1.0
0.5
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 75A
VGS, Gate-to-Source Voltage (V)
10.0
8.0
6.0
4.0
2.0
0.0
VDS= 60V
VDS= 38V
VDS= 15V
C, Capacitance(pF)
10000
Ciss
1000
Coss
Crss
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0
20
40
60
80
100
120
140
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB/S/SL3307PbF
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
100μsec
1msec
10
T J = 25°C
10
10msec
1
VGS = 0V
1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VSD, Source-to-Drain Voltage (V)
0.1
1
Tc = 25°C
Tj = 175°C
Single Pulse
DC
10
VDS, Drain-to-Source Voltage (V)
100
Fig 7.
Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
140
120
ID, Drain Current (A)
100
Fig 8.
Maximum Safe Operating Area
Limited By Package
95
100
80
60
40
20
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
90
85
80
75
70
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
1.4
Fig 10.
Drain-to-Source Breakdown Voltage
1200
EAS , Single Pulse Avalanche Energy (mJ)
1.2
1.0
1000
ID
TOP
8.6A
12A
BOTTOM 75A
800
Energy (μJ)
0.8
0.6
0.4
0.2
0.0
0
10
20
30
40
50
60
70
80
600
400
200
0
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
4
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
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IRFB/S/SL3307PbF
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
J
R
1
R
1
J
1
2
R
2
R
2
C
1
2
0.01
Ri (°C/W)
i
(sec)
0.2911 0.000484
0.3196 0.005529
0.001
Ci=
iRi
Ci iRi
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse 0.01
Avalanche Current (A)
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
300
EAR , Avalanche Energy (mJ)
250
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 75A
200
150
100
50
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as neither T
jmax
nor I
av (max)
is exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Starting T J , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy vs. Temperature
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