PD -91865B
IRF7555
HEXFET
®
Power MOSFET
Trench Technology
q
Ultra Low On-Resistance
q
Dual P-Channel MOSFET
q
Very Small SOIC Package
q
Low Profile (<1.1mm)
q
Available in Tape & Reel
q
S1
G1
S2
G2
1
8
D1
D1
D2
D2
2
7
V
DSS
= -20V
3
6
4
5
R
DS(on)
= 0.055Ω
T o p V ie w
Description
New trench HEXFET
®
power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the ruggedized device design that HEXFET
Power MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in a wide
variety of applications.
The new Micro8™ package has half the footprint area of the
standard SO-8. This makes the Micro8 an ideal package for
applications where printed circuit board space is at a premium.
The low profile (<1.1mm) of the Micro8 will allow it to fit easily
into extremely thin application environments such as portable
electronics and PCMCIA cards.
Micro8™
Absolute Maximum Ratings
Parameter
V
DS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
A
= 70°C
V
GS
E
AS
dv/dt
T
J
, T
STG
Drain-Source Voltage
Continuous Drain Current, V
GS
@ -4.5V
Continuous Drain Current, V
GS
@ -4.5V
Pulsed Drain Current
Maximum Power Dissipation
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
-20
-4.3
-3.4
-34
1.25
0.8
10
± 12
36
1.1
-55 to + 150
240 (1.6mm from case)
Units
V
A
W
W
mW/°C
V
mJ
V/ns
°C
Thermal Resistance
R
θJA
Max.
Maximum Junction-to-Ambient
Parameter
Units
100
°C/W
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1
2/2/00
IRF7555
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Min.
-20
–––
–––
–––
-0.60
2.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
––– –––
V
V
GS
= 0V, I
D
= -250µA
-0.005 ––– V/°C Reference to 25°C, I
D
= -1mA
––– 0.055
V
GS
= -4.5V, I
D
= -4.3A
Ω
––– 0.105
V
GS
= -2.5V, I
D
= -3.4A
––– -1.2
V
V
DS
= V
GS
, I
D
= -250µA
––– –––
S
V
DS
= -10V, I
D
= -0.8A
––– -1.0
V
DS
= -16V, V
GS
= 0V
µA
––– -25
V
DS
= -16V, V
GS
= 0V, T
J
= 125°C
––– -100
V
GS
= -12V
nA
––– 100
V
GS
= 12V
10
15
I
D
= -3.0A
2.1 3.1
nC V
DS
= -10V
2.5 3.7
V
GS
= -5.0V
10 –––
V
DD
= -10V
46 –––
I
D
= -2.0A
ns
60 –––
R
G
= 6.0Ω
64 –––
R
D
= 5.0Ω
1066 –––
V
GS
= 0V
402 –––
pF
V
DS
= -10V
126 –––
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
54
41
-1.3
A
-34
-1.2
82
61
V
ns
nC
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= -1.6A, V
GS
= 0V
T
J
= 25°C, I
F
= -2.5A
di/dt = -100A/µs
D
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Surface mounted on FR-4 board, t
≤
10sec.
Starting T
J
= 25°C, L = 8.0mH
R
G
= 25Ω, I
AS
= -3.0A.
I
SD
≤
-2.0A, di/dt
≤
-140A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
150°C
Pulse width
≤
300µs; duty cycle
≤
2%.
2
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IRF7555
100
VGS
-7.50V
-5.00V
-4.00V
-3.50V
-3.00V
-2.50V
-2.00V
BOTTOM -1.50V
TOP
100
-I
D
, Drain-to-Source Current (A)
-I
D
, Drain-to-Source Current (A)
VGS
-7.50V
-5.00V
-4.00V
-3.50V
-3.00V
-2.50V
-2.00V
BOTTOM -1.50V
TOP
10
10
1
1
-1.50V
-1.50V
0.1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
-V
DS
, Drain-to-Source Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.0
I
D
= -4.3A
T
J
= 25
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
-I
D
, Drain-to-Source Current (A)
1.5
T
J
= 150
°
C
10
1.0
0.5
1
1.0
V DS = -15V
20µs PULSE WIDTH
2.0
3.0
4.0
5.0
0.0
-60 -40 -20
V
GS
= -4.5V
0
20
40
60
80 100 120 140 160
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRF7555
1600
-V
GS
, Gate-to-Source Voltage (V)
V
GS
=
C
iss
=
C
rss
=
C
oss
=
0V,
f = 1MHz
C
gs
+ C
gd ,
C
ds
SHORTED
C
gd
C
ds
+ C
gd
15
I
D
=
-4.3A
-4.5A
12
1200
C, Capacitance (pF)
C
iss
V
DS
= -10V
9
800
6
400
C
oss
C
rss
0
1
10
100
3
0
0
4
8
12
16
20
24
-V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
-I
SD
, Reverse Drain Current (A)
10us
-I
D
, Drain Current (A)
I
10
10
100us
T
J
= 150
°
C
T
J
= 25
°
C
1
1ms
1
10ms
0.1
0.0
V
GS
= 0 V
0.4
0.8
1.2
1.6
2.0
2.4
0.1
0.1
T
C
= 25 ° C
T
J
= 150 ° C
Single Pulse
1
10
100
-V
SD
,Source-to-Drain Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRF7555
5.0
100
4.0
E
AS
, Single Pulse Avalanche Energy (mJ)
80
ID
TOP
-1.3A
-2.4A
BOTTOM -3.0A
-I
D
, Drain Current (A)
3.0
60
2.0
40
1.0
20
0.0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
C
, Case Temperature ( ° C)
Starting T
J
, Junction Temperature (
°
C)
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10.
Maximum Avalanche Energy
Vs. Drain Current
1000
Thermal Response (Z
thJA
)
100
D = 0.50
0.20
10
0.10
0.05
0.02
0.01
1
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJA
+ T
A
0.001
0.01
0.1
1
10
100
0.1
0.0001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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