WF512K32-XXX5
512Kx32 5V NOR FLASH MODULE (SMD 5962-94612**)
FEATURES
Access Times of 60, 70, 90, 120, 150ns
Packaging
• 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP
(H2) (Package 400).
• 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP
(Package 502)
1
• 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U)
3.5mm (0.140") high, (Package 510)
• 68 lead, 22.4mm (0.880") CQFP (G2L) 5.08mm (0.200")
high, Package (528)
100,000 Erase/Program Cycles Minimum
Sector Architecture
• 8 equal size sectors of 64KBytes each
• Any combination of sectors can be concurrently erased.
Also supports full chip erase
Organized as 512Kx32
Commercial, Industrial and Military Temperature Ranges
5 Volt Programming
* This product is subject to change without notice.
Note 1: Package Not Recommended for New Design
For Flash programming information and waveforms refer to "Flash programming 4M5 Application
Note AN0037."
** For reference only. See table page 11
Low Power CMOS
Embedded Erase and Program Algorithms
TTL Compatible Inputs and CMOS Outputs
Built-in Decoupling Caps for Low Noise Operation
Page Program Operation and Internal Program Control
Time
Weight
WF512K32-XG2UX5 - 8 grams typical
WF512K32N-XH1X5 - 13 grams typical
WF512K32-XG4TX5
(1)
- 20 grams typical
WF512K32-XG2LX5 - 8 grams typical
FIGURE 1 – PIN CONFIGURATION FOR WF512K32N-XH1X5
Top View
1
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
11
22
12
WE
2
#
CS
2
#
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
#
NC
I/O
3
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
17
WE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
#
WE
4
#
I/O
27
A
4
A
5
A
6
WE
3
#
CS
3
#
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
8
8
8
8
WE1# CS1#
OE#
A0-18
512K x 8
512K x 8
512K x 8
512K x 8
Pin Description
56
I/O
0-31
A
0-18
WE
1-4
#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Block Diagram
WE2# CS2#
WE3# CS3#
WE4# CS4#
I/O
20
66
I/O0-7
I/O8-15
I/O16-23
I/O24-31
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012
Rev. 14
© 2012 Microsemi Corporation. All rights reserved.
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WF512K32-XXX5
FIGURE 2 – PIN CONFIGURATION FOR WF512K32-XG4TX5
1
Top View
NC
A0
A1
A2
A3
A4
A5
CS1#
GND
CS3#
WE#
A6
A7
A8
A9
A10
V
CC
Pin Description
I/O
0-31
A
0-18
WE#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
Block Diagram
WE#
OE#
A0-18
CS1#
CS2#
CS3#
CS4#
512K X 8
512K X 8
512K X 8
512K X 8
CS2#
OE#
CS4#
A17
A12
A13
A14
A15
A16
A18
NC
NC
V
CC
A11
NC
NC
NC
8
8
8
8
Note 1: Package not recommended for new designs
I/O0 - 7
I/O8 - 15
I/O16 - 23
I/O24 - 31
FIGURE 3 – PIN CONFIGURATION FOR WF512K32-XG2UX5 AND WF512K32-XG2LX5
Top View
NC
A0
A1
A2
A3
A4
A5
CS3#
GND
CS4#
WE1#
A6
A7
A8
A9
A10
V
CC
Pin Description
I/O
0-31
A
0-18
WE
1-4
#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
V
CC
A11
A12
A13
A14
A15
A16
CS1#
OE#
CS2#
A17
WE2#
WE3#
WE4#
A18
NC
NC
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
Block Diagram
WE1# CS1#
OE#
A0-18
512K x 8
512K x 8
512K x 8
512K x 8
WE2# CS2#
WE3# CS3#
WE4# CS4#
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012
Rev. 14
© 2012 Microsemi Corporation. All rights reserved.
2
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WF512K32-XXX5
Absolute Maximum Ratings (1)
Parameter
Operating Temperature (Mil, Q)
Supply Voltage Range (V
CC
)
Signal voltage range (any pin except A9) (2)
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
Data Retention (Mil Temp)
Endurance - write/erase cycles
A9 Voltage for sector protect (V
ID
) (3)
-55 to +125
-2.0 to +7.0
-2.0 to +7.0
-65 to +150
+300
20 years
100,000 cycles min.
-2.0 to +12.5
Unit
°C
V
V
°C
°C
Parameter
OE# capacitance
WE
1-4
# capacitance
HIP (PGA)
CQFP G4T
CQFP G2U/G2L
CS
1-4
# capacitance
Data# I/O capacitance
Address input capacitance
CAPACITANCE
T
A
= +25°C
Symbol
C
OE
C
WE
C
CS
C
I/O
C
AD
Conditions
V
IN
= 0V, f = 1.0 MHz
V
IN
= 0V, f = 1.0 MHz
V
IN
= 0V, f = 1.0 MHz
V
I/O
= 0V, f = 1.0 MHz
V
IN
= 0V, f = 1.0 MHz
Max
50
20
50
15
20
20
50
Unit
pF
pF
pF
pF
pF
V
NOTES:
1. Stresses above the absolute maximum rating may cause permanent damage to the device.
Extended operation at the maximum levels may degrade performance and affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,inputs may
overshoot Vss to -2.0 V for periods of up to 20ns. Maximum DC voltage on output and I/O pins
is Vcc + 0.5V. During voltage transitions, outputs may overshoot to Vcc + 2.0 V for periods of up
to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may overshoot
Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is +12.5V which may
overshoot to 13.5 V for periods up to 20ns.
This parameter is guaranteed by design but not tested.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Operating Temp. (Mil., Q)
Operating Temp. (Ind.)
Operating Temp. (Com.)
Symbol
V
CC
T
A
T
A
T
A
Min
4.5
-55
-40
0
Max
5.5
+125
+85
+70
Unit
V
°C
°C
°C
DC CHARACTERISTICS
Parameter
Input Leakage Current
Output Leakage Current
V
CC
Active Current for Read (1, 2)
V
CC
Active Current for Program or Erase (2, 3)
V
CC
Standby Current (2)
Input High Voltage
Input Low Voltage
A
9
Voltage for Sector Protect
Output Low Voltage
Output High Voltage
Low V
CC
Lock-Out Voltage
Sym
I
LI
I
LOx32
I
CC1
I
CC2
I
SB
V
IH
V
IL
V
ID
V
OL
V
OH1
V
LKO
Conditions
V
CC
= V
CC MAX
, V
IN
= GND to V
CC
V
CC
= V
CC MAX
, V
OUT
= GND to V
CC
CS# = V
IL
, OE# = V
IH
, f = 5MHz
CS# = V
IL
, OE# = V
IH
CS# = V
CC
± 0.5V, f = 5MHz
Min
Max
10
10
190
240
6.5
Units
μA
μA
mA
mA
mA
V
V
V
V
V
2.0
-0.5
11.5
I
OL
= 8.0mA, V
CC
= V
CC MIN
I
OH
- 2.5mA, V
CC
= V
CC MIN
0.85
X
V
CC
3.2
V
CC
+ 0.3
+0.8
12.5
0.45
4.2
V
NOTES:
1. The I
CC
current listed includes both the DC operating current and the frequency dependent component
(at 5 MHz). The frequency component typically is less than 8 mA/MHz, with OE# at V
IH
.
2. Maximum current specifications are tested with V
CC
= V
CC MAX
3. I
CC
active while Embedded Algorithm (program or erase) is in progress.
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012
Rev. 14
© 2012 Microsemi Corporation. All rights reserved.
3
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WF512K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
Parameter
Write Cycle Time
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
Chip Programming Time
Chip Erase Time (3)
NOTES:
1. Typical value for t
WHWH1
is 7μs.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase Time is 8sec.
Symbol
t
AVAV
t
WLEL
t
ELEH
t
AVEL
t
DVEH
t
EHDX
t
ELAX
t
EHEL
t
WHWH1
t
WHWH2
t
GHEL
0
11
64
t
WC
t
WS
t
CP
t
AS
t
DS
t
DH
t
AH
t
CPH
Min
60
0
40
0
40
0
45
20
300
15
0
11
64
-60
Max
Min
70
0
45
0
45
0
45
20
300
15
0
11
64
-70
Max
Min
90
0
45
0
45
0
45
20
300
15
0
11
64
-90
Max
Min
120
0
50
0
50
0
50
20
300
15
0
11
64
-120
Max
Min
150
0
50
0
50
0
50
20
300
15
-150
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
μs
sec
ns
sec
sec
FIGURE. 4 – AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
I
OL
Current Source
D.U.T.
C
eff
= 50 pf
V
Z
≈ 1.5V
(Bipolar Supply)
Notes:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
I
OH
Current Source
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012
Rev. 14
© 2012 Microsemi Corporation. All rights reserved.
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WF512K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE# CONTROLLED
Parameter
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time before Write
VCC Set-up Time
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (4)
Chip Erase Time (3)
NOTES:
1. Typical value for t
WHWH1
is 7μs.
2. Typical value for t
WHWH2
is 1sec.
3. Typical value for Chip Erase Time is 8sec.
4. For Toggle and Data Polling.
t
OES
t
OEH
0
10
64
Symbol
t
AVAV
t
ELWL
t
WLWH
t
AVWH
t
DVWH
t
WHDX
t
WHAX
t
WHWL
t
WHWH1
t
WHWH2
t
GHWL
t
VCS
0
50
11
0
10
64
t
WC
t
CS
t
WP
t
AS
t
DS
t
DH
t
AH
t
WPH
Min
60
0
40
0
40
0
45
20
300
15
0
50
11
0
10
64
-60
Max
Min
70
0
45
0
45
0
45
20
300
15
0
50
11
0
10
64
-70
Max
Min
90
0
45
0
45
0
45
20
300
15
0
50
11
0
10
64
-90
Max
Min
120
0
50
0
50
0
50
20
300
15
0
50
11
-120
Max
Min
150
0
50
0
50
0
50
20
300
15
-150
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
μs
sec
ns
μs
sec
ns
ns
sec
t
AC
CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE# CONTROLLED
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output High Z (1)
Output Enable High to Output High Z (1)
Output Hold from Address, CS# or OE# Change,
whichever is First
1. Guaranteed by design, but not tested
Symbol
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
t
RC
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
0
Min
60
60
60
30
20
20
0
-60
Max
Min
70
70
70
35
20
20
0
-70
Max
Min
90
90
90
35
20
20
0
-90
Max
Min
120
120
120
50
30
30
0
-120
Max
Min
150
150
150
55
35
35
-150
Max
Unit
ns
ns
ns
ns
ns
ns
ns
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012
Rev. 14
© 2012 Microsemi Corporation. All rights reserved.
5
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
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