32.768 kHz ±5, ±10, ±20 ppm frequency stability options
over temp
World’s smallest TCXO in a 1.5 x 0.8 mm CSP
Operating temperature ranges:
0°C to +70°C
-40°C to +85°C
Ultra-low power: <1 µA
Vdd supply range: 1.5V to 3.63V
Improved stability reduces system power with fewer
network timekeeping updates
Internal filtering eliminates external Vdd bypass cap and
saves space
Pb-free, RoHS and REACH compliant
Smart Meters (AMR)
Health and Wellness Monitors
Pulse-per-Second (pps) Timekeeping
RTC Reference Clock
Electrical Specifications
Table 1. Electrical Characteristics
Parameter
Symbol
Fout
-5.0
F_stab
-10
-20
F_stab
-10
-13
-22
F_vdd
F_aging
-0.75
-1.5
First Year Frequency Aging
-1.0
Min.
Typ.
32.768
5.0
10
20
10
13
22
0.75
1.5
1.0
ppm
ppm
ppm
ppm
ppm
Max.
Unit
kHz
Stability part number code = E
Stability part number code = F
Stability part number code = 1
Stability part number code = E
Stability part number code = F
Stability part number code = 1
1.8V ±10%
1.5V – 3.63V
T
A
= 25°C, Vdd = 3.3V
Condition
Frequency and Stability
Output Frequency
Frequency Stability Over
Temperature
[1]
(without Initial Offset
[2]
)
Frequency Stability Over
Temperature
(with Initial Offset
[2]
)
Frequency Stability vs Voltage
Jitter Performance (T
A
= over temp)
Long Term Jitter
Period Jitter
35
2.5
µs
pp
ns
RMS
81920 cycles (2.5 sec), 100 samples
Cycles = 10,000, T
A
= 25°C, Vdd = 1.5V – 3.63V
Supply Voltage and Current Consumption
Operating Supply Voltage
Core Supply Current
[3]
Power-Supply Ramp
Vdd
Idd
t_Vdd_
Ramp
180
Start-up Time at Power-up
t_start
1.5
0.99
1.52
100
300
350
380
ms
ms
3.63
V
μA
T
A
= -40°C to +85°C
T
A
= 25°C, Vdd = 1.8V, LVCMOS Output configuration, No Load
T
A
= -40°C to +85°C, Vdd = 1.5V – 3.63V, No Load
Vdd Ramp-Up 0 to 90% Vdd, T
A
= -40°C to +85°C
T
A
= -40°C +60°C, valid output
T
A
= +60°C to +70°C, valid output
T
A
= +70°C to +85°C, valid output
Notes:
1. No board level underfill. Measured as peak-to-peak/2. Inclusive of 3x-reflow and ±20% load variation. Tested with Agilent 53132A frequency counter. Due to
the low operating frequency, the gate time must be ≥100 ms to ensure an accurate frequency measurement.
2. Initial offset is defined as the frequency deviation from the ideal 32.768 kHz at room temperature, post reflow.
3. Core operating current does not include output driver operating current or load current. To derive total operating current (no load), add core operating current
+ output driver operating current, which is a function of the output voltage swing. See the description titled
Calculating Load Current.
Rev 1.4
April 12, 2018
www.sitime.com
SiT1552
Smallest (1.2 mm ), Ultra-Low Power, 32.768 kHz MEMS TCXO
2
Table 1. Electrical Characteristics (continued)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Operating Temperature Range
Commercial Temperature
Op_Temp
Industrial Temperature
-40
85
°C
LVCMOS Output
100
Output Rise/Fall Time
Output Clock Duty Cycle
Output Voltage High
Output Voltage Low
tr, tf
50
DC
VOH
VOL
48
90%
10%
52
%
V
V
Vdd: 1.5V – 3.63V. I
OH
= -1 μA, 15 pF Load
Vdd: 1.5V – 3.63V. I
OL
= 1 μA, 15 pF Load
200
ns
10-90% (Vdd), 15 pF Load
10-90% (Vdd), 5 pF Load, Vdd ≥ 1.62V
0
70
°C
NanoDrive™ Programmable, Reduced Swing Output
Output Rise/Fall Time
Output Clock Duty Cycle
AC-coupled Programmable
Output Swing
DC-Biased Programmable
Output Voltage High Range
DC-Biased Programmable
Output Voltage Low Range
Programmable Output
Voltage Swing Tolerance
tf, tf
DC
48
0.20 to
0.80
0.60 to
1.225
0.35 to
0.80
-0.055
0.055
200
52
ns
%
SiT1552 does not internally AC-couple. This output description
is intended for a receiver that is AC-coupled. See
Table 4
for
acceptable NanoDrive swing options.
Vdd: 1.5V – 3.63V, 10 pF Load, I
OH
/ I
OL
= ±0.2 μA.
Vdd: 1.5V – 3.63V. I
OH
= -0.2 μA, 10 pF Load. See
Table 4
for
acceptable VOH/VOL setting levels.
Vdd: 1.5V – 3.63V. I
OL
= 0.2 μA, 10 pF Load. See
Table 4
for
acceptable V
OH
/V
OL
setting levels.
T
A
= -40°C to +85°C, Vdd = 1.5V to 3.63V.
30-70% (V
OL
/V
OH
), 10 pF Load
V_sw
V
VOH
VOL
V
V
V
Table 2. Pin Configuration
CSP Pin
1, 4
Symbol
GND
I/O
Power
Supply
Ground
Functionality
Connect to ground. All GND pins must be connected to power supply
ground. The GND pins can be connected together, as long as both GND
pins are connected ground.
Oscillator clock output. When interfacing to an MCU’s XTAL, the CLK Out
is typically connected to the receiving IC’s X IN pin. The SIT1552 oscillator
output includes an internal driver. As a result, the output swing and
operation is not dependent on capacitive loading. This makes the output
much more flexible, layout independent, and robust under changing
environmental and manufacturing conditions.
Connect to power supply 1.5V ≤ Vdd ≤ 3.63V. Under normal operating
conditions, Vdd does not require external bypass/decoupling capacitor(s).
3
Vdd
Power
Supply
For more information about the internal power-supply filtering,
see
Power-Supply Noise Immunity
section in the detailed description.
Contact
SiTime
for applications that require a wider operating supply
voltage range.
CSP Package (Top View)
GND
1
4
GND
2
CLK Out
OUT
CLK Out
2
3
Vdd
Figure 1. Pin Assignments
Rev 1.4
Page 2 of 12
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SiT1552
Smallest (1.2 mm ), Ultra-Low Power, 32.768 kHz MEMS TCXO
2
System Block Diagram
MEMS Resonator
GND
Control
Regulators
Vdd
Temp
Control
Temp-to-Digital
Prog
NVM
GND
Sustaining
Amp
Ultra-low
Power
Frac-n
PLL
Divider
Driver
CLK Out
Figure 2. SiT1552 Block Diagram
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Continuous Power Supply Voltage Range (Vdd)
Short Duration Maximum Power Supply Voltage (Vdd)
Continuous Maximum Operating Temperature Range
Short Duration Maximum Operating Temperature Range
Human Body Model (HBM) ESD Protection
Charge-Device Model (CDM) ESD Protection
Machine Model (MM) ESD Protection
Latch-up Tolerance
Mechanical Shock Resistance
Mechanical Vibration Resistance
1508 CSP Junction Temperature
Storage Temperature
Mil 883, Method 2002
Mil 883, Method 2007
≤30 minutes
Vdd = 1.5V - 3.63V
Vdd = 1.5V - 3.63V, ≤30 mins
JESD22-A114
JESD22- C101
JESD22- A115
JESD78 Compliant
10,000
70
150
-65°C to 150°C
g
g
°C
Test Condition
Value
-0.5 to 3.63
4.0
105
125
3000
750
300
Unit
V
V
°C
°C
V
V
V
Rev 1.4
Page 3 of 12
www.sitime.com
SiT1552
Smallest (1.2 mm ), Ultra-Low Power, 32.768 kHz MEMS TCXO
2
Description
The
SiT1552
is an ultra-small and ultra-low power 32.768 kHz
TCXO optimized for battery-powered applications. SiTime’s
silicon MEMS technology enables the first 32 kHz TCXO in
the world’s smallest footprint and chip-scale packaging
(CSP). Typical core supply current is only 1 µA.
SiTime’s MEMS oscillators consist of MEMS resonators and
a programmable analog circuit. Our MEMS resonators are
built with SiTime’s unique MEMS First™ process. A key
manufacturing step is EpiSeal™ during which the MEMS
resonator is annealed with temperatures over 1000°C.
EpiSeal creates an extremely strong, clean, vacuum
chamber that encapsulates the MEMS resonator and
ensures the best performance and reliability. During
EpiSeal, a poly silicon cap is grown on top of the resonator
cavity, which eliminates the need for additional cap wafers
or other exotic packaging. As a result, SiTime’s MEMS
resonator die can be used like any other semiconductor die.
One unique result of SiTime’s MEMS First and EpiSeal
manufacturing processes is the capability to integrate
SiTime’s MEMS die with a SOC, ASIC, microprocessor or
analog die within a package to eliminate external timing
components and provide a highly integrated, smaller,
cheaper solution to the customer.
Start-up and Steady-State Supply Current
The SiT1552 TCXO starts-up to a valid output frequency
within 300 ms (180 mstyp). To ensure the device starts-up
within the specified limit, make sure the power-supply
ramps-up in approximately 10 – 20 ms (to within 90% of Vdd).
During initial power-up, the SiT1552 power-cycles internal
blocks, as shown in the power-supply start-up and steady
state plot in the
Typical Operating Curves
section. Power-up
and initialization is typically 200 ms, and during that time,
the peak supply current reaches 28 µA as the internal
capacitors are charged, then sequentially drops to its
990 nA steady-state current. During steady-state operation,
the internal temperature compensation circuit turns on
every 350 ms for a duration of approximately 10 ms.
Output Voltage
The SiT1552 has two output voltage options. One option is a
standard LVCMOS output swing. The second option is the
NanoDrive reduced swing output. Output swing is customer
specific and programmed between 200 mV and 800 mV. For
DC-coupled applications, output V
OH
and V
OL
are individually
factory programmed to the customers’ requirement. V
OH
programming range is between 600 mV and 1.225V in
100 mV increments. Similarly, V
OL
programming range is
between 350 mV and 800 mV. For example; a PMIC or MCU
is internally 1.8V logic compatible, and requires a 1.2V V
IH
and a 0.6V V
IL
. Simply select SiT1552 NanoDrive factory
programming code to be “D14” and the correct output
thresholds will match the downstream PMIC or MCU input
requirements. Interface logic will vary by manufacturer and
we recommend that you review the input voltage
requirements for the input interface.
For DC-biased NanoDrive output configuration, the minimum
V
OL
is limited to 350mV and the maximum allowable swing
(V
OH
- V
OL
) is 750 mV. For example, 1.1V V
OH
and 400 mV
V
OL
is acceptable, but 1.2V V
OH
and 400 mV V
OL
is not
acceptable.
When the output is interfacing to an XTAL input that is
internally AC-coupled, the SiT1552 output can be factory
programmed to match the input swing requirements.
For example, if a PMIC or MCU input is internally
AC-coupled and requires an 800 mV swing, then simply
choose the SiT1552 NanoDrive programming code “AA8”
in the part number. It is important to note that the SiT1552
does not include internal AC-coupling capacitors.
Please see the
Part Number Ordering
section at the end of
the datasheet for more information about the part number
ordering scheme.
TCXO Frequency Stability
The SiT1552 is factory calibrated (trimmed) over multiple
temperature points to guarantee extremely tight stability over
temperature. Unlike quartz crystals that have a classic
tuning fork parabola temperature curve with a 25°C turnover
point with a 0.04 ppm/C2 temperature coefficient, the
SiT1552 temperature coefficient is calibrated and corrected
over temperature with an active temperature correction
circuit. The result is 32 kHz TCXO with extremely tight
frequency variation over the -40°C to +85°C temperature
range. Contact
SiTime
for applications that require a wider
supply voltage range >3.63V, or lower operating frequency
below 32 kHz.
When measuring the SiT1552 output frequency with a
frequency counter, it is important to make sure the counter's
gate time is >100 ms. The slow frequency of a 32kHz clock
will give false readings with faster gate times.
Power Supply Noise Immunity
In addition to eliminating external output load capacitors
common with standard XTALs, this device includes special
power supply filtering and thus, eliminates the need for an
external Vdd bypass-decoupling capacitor to keep the
footprint as small as possible. Internal power supply filtering is
designed to reject more than ±150 mV noise and frequency
components from low frequency to more than 10 MHz.
Rev 1.4
Page 4 of 12
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SiT1552
Smallest (1.2 mm ), Ultra-Low Power, 32.768 kHz MEMS TCXO
2
SiT1552 NanoDrive™
Figure 3
shows a typical output waveform of the SiT1552
(into a 10 pF load) when factory programmed for a 0.70V
swing and DC bias (V
OH
/V
OL
) for 1.8V logic:
Example:
NanoDrive™ part number coding:
D14.
Example part number: SiT1552AI-JE-D14-32.768
V
OH
= 1.1V, V
OL
= 0.4V (V_
sw
= 0.70V)
SiT1552 Full Swing LVCMOS Output
The SiT1552 can be factory programmed to generate full-
swing LVCMOS levels.
Figure 4
shows the typical waveform
(Vdd = 1.8V) at room temperature into a 15 pF load.
Example:
LVCMOS output part number coding is always
DCC
Example part number: SiT1552AI-JE-DCC-32.768
Figure 3. SiT1552AI-JE-D14-32.768
Output Waveform
(10 pF load)
Table 4
shows the supported NanoDrive™ V
OH
, V
OL
factory programming options.
Figure 4. LVCMOS Waveform
(Vdd = 1.8V) into 15 pF Load
Table 4. Acceptable V
OH
/V
OL
NanoDrive™ Levels
NanoDrive
D26
D14
D74
AA3
V
OH
(V)
1.2
1.1
0.7
n/a
V
OL
(V)
0.6
0.4
0.4
n/a
Swing (mV)
600 ±55
700 ±55
300 ±55
300 ±55
Comments
1.8V logic compatible
1.8V logic compatible
XTAL compatible
XTAL compatible
The values listed in
Table 4
are nominal values at 25°C
and will exhibit a tolerance of ±55 mV across Vdd and
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