HIP6004B
Data Sheet
February 1999
File Number
4567.2
Buck and Synchronous-Rectifier (PWM)
Controller and Output Voltage Monitor
The HIP6004B provides complete control and protection for
a DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous-rectified buck
topology. The HIP6004B integrates all of the control, output
adjustment, monitoring and protection functions into a
single package.
The output voltage of the converter is easily adjusted and
precisely regulated. The HIP6004B includes a fully TTL-
compatible 5-input digital-to-analog converter (DAC) that
adjusts the output voltage from 1.3V
DC
to 2.05V
DC
in
0.05V and from 2.1V
DC
to 3.5V
DC
in 0.1V increments
steps. The precision reference and voltage-mode regulator
hold the selected output voltage to within
±1%
over
temperature and line voltage variations.
The HIP6004B provides simple, single feedback loop,
voltage-mode control with fast transient response. It
includes a 200kHz free-running triangle-wave oscillator that
is adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.
The HIP6004B monitors the output voltage with a window
comparator that tracks the DAC output and issues a Power
Good signal when the output is within
±10%.
The
HIP6004B protects against over-current and overvoltage
conditions by inhibiting PWM operation. Additional built-in
overvoltage protection triggers an external SCR to crowbar
the input supply. The HIP6004B monitors the current by
using the r
DS(ON)
of the upper MOSFET which eliminates
the need for a current sensing resistor.
Features
• Drives Two N-Channel MOSFETs
• Operates from +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
-
±1%
Over Line Voltage and Temperature
• TTL-Compatible 5-Bit Digital-to-Analog Output
Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V
DC
to 3.5V
DC
- 0.1V Binary Steps . . . . . . . . . . . . . . 2.1V
DC
to 3.5V
DC
- 0.05V Binary Steps . . . . . . . . . . . . 1.3V
DC
to 2.05V
DC
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFET’s r
DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to over 1MHz
Applications
• Power Supply for Pentium®, Pentium Pro, Pentium II,
PowerPC™, K6™, 6X86™ and Alpha™ Microprocessors
• High-Power 5V to 3.xV DC-DC Regulators
• Low-Voltage Distributed Power Supplies
Pinout
HIP6004B
(SOIC, TSSOP)
TOP VIEW
VSEN
1
2
3
4
5
6
7
8
9
20 RT
19 OVP
18 VCC
17 LGATE
16 PGND
15 BOOT
14 UGATE
13 PHASE
12 PGOOD
11 GND
Ordering Information
PART NUMBER
HIP6004BCB
HIP6004BCV
TEMP.
RANGE (
o
C)
0 to 70
0 to 70
PACKAGE
20 Ld SOIC
20 Ld TSSOP
PKG.
NO.
M20.3
M20.173
OCSET
SS
VID0
VID1
VID2
VID3
VID4
COMP
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the TSSOP variant in tape and reel, e.g., HIP6004BCV-T.
FB 10
6X86™ is a trademark of Cyrix Corporation.
Alpha™ is a trademark of Digital Equipment Corporation.
K6™ is a trademark of Advanced Micro Devices, Inc.
Pentium® is a registered trademark of Intel Corporation.
PowerPC™ is a trademark of IBM.
2-75
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-800-4-HARRIS
|
Copyright
©
Harris Corporation 1999
HIP6004B
Typical Application
+12V
VCC
PGOOD
SS
OVP
RT
VID0
VID1
VID2
VID3
VID4
FB
MONITOR AND
PROTECTION
OCSET
EN
BOOT
V
IN
= +5V OR +12V
OSC
HIP6004B
D/A
+
+
UGATE
PHASE
+V
OUT
-
LGATE
PGND
VSEN
GND
-
COMP
Block Diagram
VCC
VSEN
110%
+
POWER-ON
RESET (POR)
-
-
-
-
PGOOD
90%
+
115%
+
SOFT-
START
OVER-
CURRENT
4V
OVER-
VOLTAGE
10µA
OVP
SS
BOOT
UGATE
PHASE
VID0
VID1
VID2
VID3
VID4
FB
COMP
GND
RT
OSCILLATOR
TTL D/A
CONVERTER
(DAC)
DACOUT
+
PWM
COMPARATOR
GATE
INHIBIT CONTROL
LOGIC
PWM
LGATE
PGND
+
OCSET
REFERENCE
200µA
-
+
-
ERROR
AMP
2-76
HIP6004B
Absolute Maximum Ratings
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
Boot Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . . . +15V
Input, Output or I/O Voltage . . . . . . . . . . . .GND -0.3V to V
CC
+0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
SOIC Package (with 3in
2
of Copper) . . . . . . . . . . . .
86
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
140
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(Lead Tips Only)
Operating Conditions
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . +12V
±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
V
CC
SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
Rising V
CC
Threshold
Falling V
CC
Threshold
Rising V
OCSET
Threshold
OSCILLATOR
Free Running Frequency
Total Variation
Ramp Amplitude
REFERENCE AND DAC
Recommended Operating Conditions, Unless Otherwise Noted
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
CC
UGATE and LGATE Open
-
5
-
mA
V
OCSET
= 4.5V
V
OCSET
= 4.5V
-
8.2
-
-
-
1.26
10.4
-
-
V
V
V
RT = OPEN
6kΩ < RT to GND < 200kΩ
∆V
OSC
RT = Open
185
-15
-
200
-
1.9
215
+15
-
kHz
%
V
P-P
DAC (VID0-VID4) Input Low Voltage
DAC (VID0-VID4) Input High Voltage
DACOUT Voltage Accuracy
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
Slew Rate
GATE DRIVERS
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
PROTECTION
Over-Voltage Trip (V
SEN
/DACOUT)
OCSET Current Source
OVP Sourcing Current
Soft Start Current
I
OCSET
I
OVP
I
SS
V
OCSET
= 4.5V
DC
V
SEN
= 5.5V, V
OVP
= 0V
I
UGATE
R
UGATE
I
LGATE
R
LGATE
V
BOOT
- V
PHASE
= 12V, V
UGATE
= 6V
I
LGATE
= 0.3A
V
CC
= 12V, V
LGATE
= 6V
I
LGATE
= 0.3A
GBW
SR
COMP = 10pF
-
2.0
-1.0
-
-
-
0.8
-
+1.0
V
V
%
-
-
-
88
15
6
-
-
-
dB
MHz
V/µs
350
-
300
-
500
5.5
450
3.5
-
10
-
6.5
mA
Ω
mA
Ω
-
170
60
-
115
200
-
10
120
230
-
-
%
µA
mA
µA
2-77
HIP6004B
Electrical Specifications
PARAMETER
POWER GOOD
Upper Threshold (V
SEN
/DACOUT)
Lower Threshold (V
SEN
/DACOUT)
Hysteresis (V
SEN
/DACOUT)
PGOOD Voltage Low
V
PGOOD
V
SEN
Rising
V
SEN
Falling
Upper and Lower Threshold
I
PGOOD
= -5mA
106
89
-
-
-
-
2
0.5
111
94
-
-
%
%
%
V
Recommended Operating Conditions, Unless Otherwise Noted
(Continued)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Typical Performance Curves
80
70
1000
RESISTANCE (kΩ)
R
T
PULLUP
TO +12V
I
CC
(mA)
60
50
40
C
GATE
= 1000pF
30
10
R
T
PULLDOWN TO V
SS
10
0
100
200
300
400
500
600
20
C
GATE
= 10pF
C
UPPER
= C
LOWER
= C
GATE
C
GATE
= 3300pF
100
10
100
SWITCHING FREQUENCY (kHz)
1000
700
800
900
1000
SWITCHING FREQUENCY (kHz)
FIGURE 1. R
T
RESISTANCE vs FREQUENCY
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
2-78
HIP6004B
Functional Pin Descriptions
PGOOD (Pin 12)
VSEN
OCSET
SS
VID0
VID1
VID2
VID3
VID4
COMP
1
2
3
4
5
6
7
8
9
20 RT
19 OVP
18 VCC
17 LGATE
16 PGND
15 BOOT
14 UGATE
13 PHASE
12 PGOOD
11 GND
PGOOD is an open collector output used to indicate the
status of the converter output voltage. This pin is pulled low
when the converter output is not within
±10%
of the
DACOUT reference voltage. Exception to this behavior is
the ‘11111’ VID pin combination which disables the
converter; in this case PGOOD asserts a high level.
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source.
This pin is used to monitor the voltage drop across the
MOSFET for over-current protection. This pin also provides
the return path for the upper gate drive.
FB 10
VSEN (Pin 1)
This pin is connected to the converters output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
OCSET (Pin 2)
Connect a resistor (R
OCSET
) from this pin to the drain of
the upper MOSFET. R
OCSET
, an internal 200µA current
source (I
OCS
), and the upper MOSFET on-resistance
(r
DS(ON)
) set the converter over-current (OC) trip point
according to the following equation:
I
OCSET
x R
OCSET
I
PEAK
= ----------------------------------------------------
-
r
DS
(
ON
)
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND (Pin 16)
This is the power ground connection. Tie the lower
MOSFET source to this pin.
LGATE (Pin 17)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
An over-current trip cycles the soft-start function.
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft-
start interval of the converter.
VCC (Pin 18)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition. Output rising 15% more
than the DAC-set voltage triggers a high output on this pin
and disables PWM gate drive circuitry.
VID0-4 (Pins 4-8)
VID0-4 are the input pins to the 5-bit DAC. The states of
these five pins program the internal voltage reference
(DACOUT). The level of DACOUT sets the converter output
voltage. It also sets the PGOOD and OVP thresholds. Table
1 specifies DACOUT for the all combinations of DAC inputs.
RT (Pin 20)
This pin provides oscillator switching frequency
adjustment. By placing a resistor (R
T
) from this pin to GND,
the nominal 200kHz switching frequency is increased
according to the following equation:
5 x 10
Fs
≈
200kHz
+ --------------------
-
R
T
(
kΩ
)
6
COMP (Pin 9) and FB (Pin 10)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
(R
T
to GND)
GND (Pin 11)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
Conversely, connecting a pull-up resistor (R
T
) from this pin
to V
CC
reduces the switching frequency according to the
following equation:
4 x 10
Fs
≈
200kHz
– --------------------
-
R
T
(
kΩ
)
7
(R
T
to 12V)
2-79
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