®
FAST CMOS OCTAL
TRANSCEIVER/REGISTER
IDT54/74FCT646
IDT54/74FCT646A
IDT54/74FCT646C
Integrated Device Technology, Inc.
FEATURES:
•
•
•
•
•
•
•
•
•
•
IDT54/74FCT646 equivalent to FAST™ speed;
IDT54/74FCT646A 30% faster than FAST
IDT54/74FCT646C 40% faster than FAST
Independent registers for A and B buses
Multiplexed real-time and stored data
I
OL
= 64mA (commercial) and 48mA (military)
CMOS power levels (1mW typical static)
TTL input and output level compatible
CMOS output level compatible
Available in 24-pin (300 mil) CERDIP, plastic DIP, SOIC,
CERPACK and 28-pin LCC
• Product available in Radiation Tolerant and Radiation
Enhanced Versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT646/A/C consists of a bus transceiver
with 3-state D-type flip-flops and control circuitry arranged for
multiplexed transmission of data directly from the data bus or
from the internal storage registers.
The IDT54/74FCT646/A/C utilizes the enable control (
G
)
and direction (DIR) pins to control the transceiver functions.
SAB and SBA control pins are provided to select either real
time or stored data transfer. The circuitry used for select
control will eliminate the typical decoding glitch that occurs in
a multiplexer during the transition between stored and real-
time data. A LOW input level selects real-time data and a
HIGH selects stored data.
Data on the A or B data bus or both can be stored in the
internal D flip flops by LOW-to-HIGH transitions at the
appropriate clock pins (CPAB or CPBA) regardless of the
select or enable control pins.
FUNCTIONAL BLOCK DIAGRAM
G
DIR
CPBA
SBA
CPAB
SAB
1 OF 8 CHANNELS
B REG
1D
C
1
A
1
A REG
1D
C
1
B
1
TO 7 OTHER CHANNELS
2536 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4626/2
7.18
1
IDT54/74FCT646/A/C
FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
INDEX
12
13
A
7
A
8
GND
NC
B
8
B
7
B
6
CPAB
SAB
DIR
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
11
24
23
22
P24-1,
D24-1,
S024-2
&
E24-1
21
20
19
18
17
16
15
14
Vcc
CPBA
SBA
G
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
DIR
SAB
CPAB
NC
Vcc
CPBA
SBA
4
3
2
1
28 27 26
25
24
23
5
6
7
8
9
10
A
1
A
2
A
3
NC
A
4
A
5
A
6
L28-1
22
21
20
11
19
12 13 14 15 16 17 18
G
B
1
B
2
NC
B
3
B
4
B
5
2536 drw 02
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
PIN DESCRIPTION
Pin Names
A
1
–A
8
B
1
–B
8
CPAB, CPBA
SAB, SBA
DIR,
G
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
2536 tbl 01
LOGIC SYMBOL
CPAB
SAB
DIR
CPBA
SBA
G
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
2536 drw 06
FUNCTION TABLE
(2)
G
H
H
L
L
L
L
Inputs
DIR
X
X
L
L
H
H
CPAB
H or L
↑
X
X
X
H or L
CPBA
H or L
↑
X
H or L
X
X
SAB
X
X
X
X
L
H
SBA
X
X
L
H
X
X
Data I/O
(1)
A
1
–A
8
Input
Output
Input
B
1
–B
8
Input
Input
Output
Operation or Function
IDT54/74FCT646
Isolation
Store A and B Data
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
NOTES:
2536 tbl 02
1. The data output functions may be enabled or disabled by various signals at the
G
or DIR inputs. Data input functions are always enabled, i.e., data at
the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
2. H = HIGH, L = LOW, X = Don’t Care,
↑
= LOW-to-HIGH Transition.
7.18
2
IDT54/74FCT646/A/C
FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
BUS
A
BUS
B
BUS
A
BUS
B
DIR
L
G
L
CPAB
X
CPBA
X
SAB
X
SBA
L
DIR
H
G
L
CPAB
X
CPBA
X
SAB
L
SBA
X
2536 drw 03
REAL–TIME TRANSFER
BUS B TO BUS A
REAL–TIME TRANSFER
BUS A TO BUS B
BUS
A
BUS
B
BUS
A
BUS
B
DIR
H
L
X
G
L
L
H
CPAB
X
CPBA
X
SAB
X
X
X
SBA
X
X
X
DIR
L
H
(1)
G
L
L
CPAB
X
H or L
CPBA
H or L
X
SAB
X
H
SBA
H
X
2536 drw 04
STORAGE FROM
A AND/OR B
NOTE:
1. Cannot transfer data to A bus and B bus simultaneously.
TRANSFER STORED
DATA TO A AND/OR B
7.18
3
IDT54/74FCT646/A/C
FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
(2)
V
TERM
Terminal Voltage
with Respect
to GND
(3)
V
TERM
Terminal Voltage
with Respect
to GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
P
T
Power Dissipation
I
OUT
DC Output Current
Commercial
Military
Unit
–0.5 to +7.0 –0.5 to +7.0
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ. Max. Unit
6
8
10
12
pF
pF
tbl 04
–0.5 to V
CC
–0.5 to V
CC
V
NOTE:
2536
1. This parameter is measured at characterization but not tested.
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
NOTES:
2536 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
CC
by +0.5V unless otherwise noted.
2. Inputs and V
CC
terminals only.
3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(Except I/O pins)
Input LOW Current
(Except I/O pins)
Input HIGH Current
(I/O pins only)
Input LOW Current
(I/O pins only)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
I
OH
= –300µA
V
CC
= Min.
I
OH
= –12mA MIL.
V
IN
= V
IH
or V
IL
I
OH
= –15mA COM’L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
I
OL
= 300µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 48mA MIL.
I
OL
= 64mA COM’L.
Min.
2.0
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.0
4.0
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
15
15
(4)
–15
(4)
–15
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.55
0.55
Unit
V
V
µA
µA
V
mA
V
V
OL
Output LOW Voltage
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
2536 tbl 05
7.18
4
IDT54/74FCT646/A/C
FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
G
= DIR = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
G
= DIR = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
G
= DIR = GND
Eight Bits Toggling
at f
i
= 5MHz
50% Duty Cycle
V
IN
≥
V
HC
V
IN
≤
V
LC
Min.
—
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2.0
0.25
Unit
mA
mA
mA/MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4.0
mA
—
2.2
6.0
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
7.0
12.8
(5)
—
9.2
21.8
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
2536 tbl 06
7.18
5
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