®
FAST CMOS OCTAL
TRANSPARENT LATCHES
Integrated Device Technology, Inc.
IDT54/74FCT373/A/C
IDT54/74FCT533/A/C
IDT54/74FCT573/A/C
FEATURES
• IDT54/74FCT373/533/573 equivalent to FAST™ speed
and drive
• IDT54/74FCT373A/533A/573A up to 30% faster than
FAST
• Equivalent to FAST output drive over full temperature
and voltage supply extremes
• I
OL
= 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• Octal transparent latch with 3-state output control
• JEDEC standard pinout for DIP and LCC
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION
The IDT54/74FCT373/A/C, IDT54/74FCT533/A/C and
IDT54/74FCT573/A/C are octal transparent latches built us-
ing an advanced dual metal CMOS technology. These octal
latches have 3-state outputs and are intended for bus oriented
applications. The flip-flops appear transparent to the data
when Latch Enable (LE) is HIGH. When LE is LOW, the data
that meets the set-up time is latched. Data appears on the bus
when the Output Enable (
OE
) is LOW. When
OE
is HIGH, the
bus output is in the high-impedance state.
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT373 AND IDT54/74FCT573
D
0
D
O
G
G
D
1
D
O
G
D
2
D
O
G
D
3
D
O
G
D
4
D
O
G
D
5
D
O
G
D
6
D
O
G
D
7
D
O
LE
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
2602 cnv* 01
IDT54/74FCT533
D
0
D
O
G
G
D
1
D
O
G
D
2
D
O
G
D
3
D
O
G
D
4
D
O
G
D
5
D
O
G
D
6
D
O
G
D
7
D
O
LE
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
2602 cnv* 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4624/2
7.12
1
IDT54/74FCT373/533/573/A/C
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT373
OE
1
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
2
3
4
5
6
7
8
9
10
19
18
P20-1 17
D20-1 16
SO20-2 15
&
E20-1 14
13
12
11
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
LE
D
1
O
1
O
2
D
2
D
3
4
5
6
7
8
D
0
3
O
0
2
OE
1
20
V
CC
20 19
18
17
16
15
14
V
CC
O
7
INDEX
D
7
D
6
O
6
O
5
D
5
L20-2
9 10 11 12 13
O
3
GND
O
4
1
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
IDT54/74FCT573
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
&
E20-1
19
18
17
16
15
14
13
12
11
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
LE
3
D
2
D
3
D
4
D
5
D
6
4
5
6
7
8
9 10 11 12 13
L20-2
2
20 19
18
17
16
15
14
O
1
O
2
O
3
O
4
O
5
D
7
GND
D
1
OE
LE
OE
1
O
7
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
IDT54/74FCT533
D
0
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
2
3
4
5
6
7
8
9
10
19
18
P20-1
D20-1 16
SO20-2 15
&
14
E20-1
13
12
11
17
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
LE
D
1
O
1
O
2
D
2
D
3
4
5
6
7
8
9 10 11 12 13
L20-2
3 2
20 19
18
17
16
15
14
D
7
D
6
O
6
O
5
D
5
O
0
OE
1
20
V
CC
LE
O
3
GND
O
4
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
7.12
D
4
V
CC
O
7
INDEX
O
6
O
0
D
0
1
20
V
CC
OE
V
CC
INDEX
LE
D
4
2602 cnv* 03–08
2
IDT54/74FCT373/533/573/A/C
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE (FCT533)
(1)
D
N
H
L
X
Inputs
LE
H
H
X
Outputs
FUNCTION TABLE (FCT373 and FCT573)
(1)
O
N
L
H
Z
2602 tbl 05
OE
L
L
H
D
N
H
L
X
Inputs
LE
H
H
X
OE
L
L
H
Outputs
O
N
H
L
Z
2602 tbl 06
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
PIN DESCRIPTION
Pin Names
D
N
LE
Description
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
3-State Outputs
Complementary 3-State Outputs
2602 tbl 07
OE
O
N
O
N
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
(2)
Terminal Voltage
V
TERM
–0.5 to +7.0
with Respect to
GND
(3)
Terminal Voltage
V
TERM
–0.5 to V
CC
with Respect to
GND
T
A
Operating
0 to +70
Temperature
T
BIAS
Temperature
–55 to +125
Under Bias
T
STG
Storage
–55 to +125
Temperature
P
T
Power Dissipation
0.5
I
OUT
DC Output
Current
120
Military
–0.5 to +7.0
Unit
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
–0.5 to V
CC
V
–55 to +125
–65 to +135
–65 to +150
0.5
120
°
C
°
C
°
C
W
mA
NOTE:
2602 tbl 02
1. This parameter is measured at characterization but not tested.
NOTES:
2602 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
7.12
3
IDT54/74FCT373/533/573/A/C
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
OS
V
OH
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
I
OH
= –300µA
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µA
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Off State (High Impedance)
Output Current
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2.0
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.5
0.5
2602 tbl 03
Unit
V
V
µA
µA
V
mA
V
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
7.12
4
IDT54/74FCT373/533/573/A/C
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
= GND
LE
=
V
CC
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
= GND
LE
=
V
CC
Eight Bits Toggling
Min.
—
—
V
IN
≥
V
HC
V
IN
≤
V
LC
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2.0
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4.0
mA
—
2.0
5.0
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
3.2
6.5
(5)
—
5.2
14.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
2602 tbl 04
7.12
5
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
