®
FAST CMOS 8-BIT
IDENTITY COMPARATOR
Integrated Device Technology, Inc.
IDT54/74FCT521
IDT54/74FCT521A
IDT54/74FCT521B
IDT54/74FCT521C
FEATURES:
•
•
•
•
•
•
•
•
•
•
IDT54/74FCT521 equivalent to FAST speed
IDT54/74FCT521A 35% faster than FAST
IDT54/74FCT521B 50% faster than FAST
IDT54/74FCT521C 60% faster than FAST
Equivalent to FAST output drive over full temperature
and voltage supply extremes
I
OL
= 48mA (commercial), and 32mA (military)
CMOS power levels (1mW typ. static)
TTL input and output level compatible
CMOS output level compatible
Substantially lower input current levels than FAST
(5µA max.)
TM
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• JEDEC standard pinout for DIP and LCC
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT521/A/B/C are 8-bit identity comparators
built using an advanced dual metal CMOS technology. These
devices compare two words of up to eight bits each and
provide a LOW output when the two words match bit for bit.
The expansion input
I
A = B
also serves as an active LOW
enable input.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
I
A=B
1
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
&
E20-1
20
19
18
17
16
15
14
13
12
11
V
CC
O
A=B
B
7
A
7
B
6
A
6
B
5
A
5
B
4
A
4
2604 drw 01
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
A
4
B
4
A
5
B
5
A
6
B
6
A
7
B
7
I
A=B
2604 drw 03
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
GND
O
A=B
DIP/SOIC/CERPACK
TOP VIEW
3 2
A
1
B
1
A
2
B
2
A
3
4
5
6
7
8
A
0
I
A=B
V
CC
1
B
0
INDEX
20 19
18
17
16
15
14
O
A=B
B
7
A
7
B
6
A
6
B
5
L20-2
9 10 11 12 13
GND
B
3
B
4
A
4
A
5
2604 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
LCC
TOP VIEW
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4617/2
7.16
1
IDT54/74FCT521/A/B/C FAST CMOS
8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
A
0
- A
7
B
0
- B
7
I
A
O
A
FUNCTION TABLE
(1)
Description
INPUTS
I
A
OUTPUT
A, B
A = B*
A
≠
B
A = B*
A
≠
B
O
A
Word A Inputs
Word B Inputs
Expansion or Enable Input (Active LOW)
Identity Output (Active LOW)
2604 tbl* 05
=
B
L
L
H
H
=B
=
B
=
B
L
H
H
H
2604 tbl* 06
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
*
A
0 =
B
0,
A
1 =
B
1,
A
2 =
B
2, etc.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Unit
V
Rating
Terminal Voltage
with Respect to
GND
Terminal Voltage
with Respect to
GND
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
Power
Dissipation
DC Output
Current
Commercial
–0.5 to +7.0
Military
–0.5 to +7.0
V
TERM(3)
–0.5 to V
CC
–0.5 to V
CC
V
Symbol
Parameter
(1)
Input
C
IN
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
2604 tbl* 02
1. This parameter is measured at characterization but not tested.
T
A
T
BIAS
T
STG
P
T
I
OUT
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
NOTES:
2604 tbl* 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
7.16
2
IDT54/74FCT521/A/B/C FAST CMOS
8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
I H
I
I L
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
Min.
2.0
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.5
0.5
Unit
V
V
µA
V
mA
V
I
OH
= –300µA
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
V
OL
Output LOW Voltage
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µA
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
2604 tbl* 03
7.16
3
IDT54/74FCT521/A/B/C FAST CMOS
8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
One Bit Toggling
50% Duty Cycle
Min.
—
Typ.
(2)
0.2
Max.
1.5
Unit
mA
—
V
IN
≥
V
HC
V
IN
≤
V
LC
—
0.5
0.15
2.0
0.25
mA
mA/
MHz
I
C
Total Power Supply Current
(5)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
—
1.7
2.0
4.0
5.0
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. I
C
= I
QUIESCENT +
I
INPUTS +
I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + fiNi)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
2604 tbl* 04
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT521
Com'l.
Symbol
t
PLH
t
PHL
Mil.
IDT54/74FCT521A
Com'l.
Mil.
IDT54/74FCT521B
Com'l.
Mil.
IDT54/74FCT521C
Com'l.
Mil.
Unit
ns
Parameter Condition
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max.
Propagation C
L
= 50pF
Delay
An or Bn to
O
A
R
L
= 500
Ω
1.5
11.0
1.5
15.0
1.5
7.2
1.5
9.5
1.5
5.5
1.5
7.3
1.5
4.5
1.5
5.1
=
B
1.5
10.0
1.5
9.0
1.5
6.0
1.5
7.8
1.5
4.6
1.5
6.0
1.5
4.1
1.5
4.5
ns
t
PLH
t
PHL
Propagation
Delay
I
A
=
B
to
O
A
=
B
2604 tbl* 07
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
7.16
4
IDT54/74FCT521/A/B/C FAST CMOS
8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
500Ω
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
2604 tbl 08
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
t
SU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
REM
3V
1.5V
0V
3V
1.5V
0V
t
H
3V
1.5V
0V
3V
1.5V
0V
PULSE WIDTH
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
SU
t
H
PROPAGATION DELAY
3V
1.5V
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
3V
1.5V
0V
t
PHL
0V
V
OH
1.5V
V
OL
ENABLE AND DISABLE TIMES
ENABLE
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY SWITCH
LOW CLOSED
t
PZH
OUTPUT SWITCH
NORMALLY OPEN
HIGH
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
V
OH
0V
t
PLZ
DISABLE
3V
1.5V
0V
3.5V
V
OL
SAME PHASE
INPUT TRANSITION
NOTES
2604 drw 04
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0 MHz; Z
O
≤
50Ω; t
F
≤
2.5ns;
t
R
≤
2.5ns.
7.16
5
stm32/stm8
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