Datasheet> 器件分类 > 存储> 存储> IDT72T40118L5BB

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IDT72T40118L5BB: 产品描述FIFO, 128KX40, 3.6ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208; 产品类别存储存储; 文件大小472KB，共52页; 制造商IDT (Integrated Device Technology)

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IDT72T40118L5BB概述

FIFO, 128KX40, 3.6ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208

IDT72T40118L5BB规格参数

参数名称	属性值
是否Rohs认证	不符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	BGA
包装说明	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208
针数	208
Reach Compliance Code	not_compliant
ECCN代码	EAR99
最长访问时间	3.6 ns
其他特性	ALTERNATIVE MEMORY WIDTH: 10 AND 20
最大时钟频率 (fCLK)	200 MHz
周期时间	5 ns
JESD-30 代码	S-PBGA-B208
JESD-609代码	e0
长度	17 mm
内存密度	5242880 bit
内存集成电路类型	OTHER FIFO
内存宽度	40
湿度敏感等级	3
功能数量	1
端子数量	208
字数	131072 words
字数代码	128000
工作模式	SYNCHRONOUS
最高工作温度	70 °C
最低工作温度
组织	128KX40
可输出	YES
封装主体材料	PLASTIC/EPOXY
封装代码	BGA
封装等效代码	BGA208,16X16,40
封装形状	SQUARE
封装形式	GRID ARRAY
并行/串行	PARALLEL
峰值回流温度（摄氏度）	225
电源	1.5/2.5,2.5 V
认证状态	Not Qualified
座面最大高度	1.97 mm
最大待机电流	0.05 A
最大压摆率	0.06 mA
最大供电电压 (Vsup)	2.625 V
最小供电电压 (Vsup)	2.375 V
标称供电电压 (Vsup)	2.5 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	Tin/Lead (Sn63Pb37)
端子形式	BALL
端子节距	1 mm
端子位置	BOTTOM
处于峰值回流温度下的最长时间	30
宽度	17 mm
Base Number Matches	1

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2.5 VOLT HIGH-SPEED TeraSync™ DDR/SDR FIFO 40-BIT CONFIGURATION

16,384 x 40, 32,768 x 40,

65,536 x 40, 131,072 x 40

IDT72T4088, IDT72T4098

IDT72T40108, IDT72T40118

•

FEATURES

•

Choose among the following memory organizations:

IDT72T4088

⎯

16,384 x 40

IDT72T4098

⎯

32,768 x 40

IDT72T40108

⎯

65,536 x 40

IDT72T40118

⎯

131,072 x 40

Up to 250MHz operating frequency or 10Gbps throughput in SDR mode

Up to 110MHz operating frequency or 10Gbps throughput in DDR mode

Users selectable input port to output port data rates, 500Mb/s

Data Rate

-DDR to DDR

-DDR to SDR

-SDR to DDR

-SDR to SDR

User selectable HSTL or LVTTL I/Os

Read Enable & Read Clock Echo outputs aid high speed operation

2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage

3.3V Input tolerant

Mark & Retransmit, resets read pointer to user marked position

Write Chip Select (WCS) input enables/disables Write

Operations

Read Chip Select (RCS) synchronous to RCLK

Programmable Almost-Empty and Almost-Full flags, each flag

•

can default to one of four preselected offsets

Dedicated serial clock input for serial programming of flag offsets

User selectable input and output port bus sizing

-x40 in to x40 out

-x40 in to x20 out

-x40 in to x10 out

-x20 in to x40 out

-x10 in to x40 out

Auto power down minimizes standby power consumption

Master Reset clears entire FIFO

Partial Reset clears data, but retains programmable settings

Empty and Full flags signal FIFO status

Select IDT Standard timing (using

and

flags) or First

Word Fall Through timing (using

and

flags)

Output enable puts data outputs into High-Impedance state

JTAG port, provided for Boundary Scan function

208 Ball Grid array (PBGA), 17mm x 17mm, 1mm pitch

Easily expandable in depth and width

Independent Read and Write Clocks (permit reading and writing

simultaneously)

High-performance submicron CMOS technology

Industrial temperature range (-40°C to +85°C) is available

Green parts available, see ordering information

FUNCTIONAL BLOCK DIAGRAM

-D

(x40, x20, x10)

WEN

WCS

WCLK

SREN SEN

SCLK

WSDR

INPUT REGISTER

OFFSET REGISTER

FF/IR

PAF

EF/OR

PAE

FWFT

FSEL0

FSEL1

WRITE CONTROL

LOGIC

RAM ARRAY

16,384 x 40,

32,768 x 40

65,536 x 40

131,072 x 40

FLAG

LOGIC

WRITE POINTER

READ POINTER

MRS

PRS

TCK

TRST

TMS

TDO

TDI

Vref

HSTL

BUS

CONFIGURATION

RESET

LOGIC

OUTPUT REGISTER

READ

CONTROL

LOGIC

MARK

RSDR

JTAG CONTROL

(BOUNDARY SCAN)

RCLK

REN

RCS

HSTL I/0

CONTROL

EREN

5995 drw01

-Q

(x40, x20, x10)

ERCLK

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The TeraSync is a trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

FEBRUARY 2009

DSC-5995/11

IDT72T40118L5BB相似产品对比

	IDT72T40118L5BB	IDT72T40118L6-7BB	IDT72T40108L4BB	IDT72T40118L10BB	IDT72T40108L10BB	IDT72T4098L4BB	IDT72T40108L5BB	IDT72T40118L4BB	IDT72T40118L4BBG	IDT72T40108L6-7BB
描述	FIFO, 128KX40, 3.6ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 128KX40, 3.8ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 64KX40, 3.2ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 128KX40, 4.5ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 64KX40, 4.5ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 32KX40, 3.2ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 64KX40, 3.6ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 128KX40, 3.2ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 128KX40, 3.2ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	FIFO, 64KX40, 3.8ns, Synchronous, CMOS, PBGA208, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208
是否Rohs认证	不符合	不符合	不符合	不符合	不符合	不符合	不符合	不符合	符合	不符合
零件包装代码	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
包装说明	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-208
针数	208	208	208	208	208	208	208	208	208	208
Reach Compliance Code	not_compliant	_compli	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	compliant	not_compliant
ECCN代码	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
最长访问时间	3.6 ns	3.8 ns	3.2 ns	4.5 ns	4.5 ns	3.2 ns	3.6 ns	3.2 ns	3.2 ns	3.8 ns
其他特性	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20	ALTERNATIVE MEMORY WIDTH: 10 AND 20
周期时间	5 ns	6.7 ns	4 ns	10 ns	10 ns	4 ns	5 ns	4 ns	4 ns	6.7 ns
JESD-30 代码	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208
JESD-609代码	e0	e0	e0	e0	e0	e0	e0	e0	e1	e0
长度	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm
内存密度	5242880 bit	5242880 bi	2621440 bit	5242880 bit	2621440 bit	1310720 bit	2621440 bit	5242880 bit	5242880 bit	2621440 bit
内存宽度	40	40	40	40	40	40	40	40	40	40
湿度敏感等级	3	3	3	3	3	3	3	3	3	3
功能数量	1	1	1	1	1	1	1	1	1	1
端子数量	208	208	208	208	208	208	208	208	208	208
字数	131072 words	131072 words	65536 words	131072 words	65536 words	32768 words	65536 words	131072 words	131072 words	65536 words
字数代码	128000	128000	64000	128000	64000	32000	64000	128000	128000	64000
工作模式	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
组织	128KX40	128KX40	64KX40	128KX40	64KX40	32KX40	64KX40	128KX40	128KX40	64KX40
可输出	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
封装形状	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
封装形式	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
并行/串行	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
峰值回流温度（摄氏度）	225	225	225	225	225	225	225	225	260	225
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.97 mm	1.97 mm	1.97 mm	1.97 mm	1.97 mm	1.97 mm	1.97 mm	1.97 mm	1.97 mm	1.97 mm
最大供电电压 (Vsup)	2.625 V	2.625 V	2.625 V	2.625 V	2.625 V	2.625 V	2.625 V	2.625 V	2.625 V	2.625 V
最小供电电压 (Vsup)	2.375 V	2.375 V	2.375 V	2.375 V	2.375 V	2.375 V	2.375 V	2.375 V	2.375 V	2.375 V
标称供电电压 (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
表面贴装	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子面层	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	TIN SILVER COPPER	Tin/Lead (Sn63Pb37)
端子形式	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
端子节距	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
端子位置	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
处于峰值回流温度下的最长时间	30	30	30	30	30	30	30	30	30	30
宽度	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm
厂商名称	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
最大时钟频率 (fCLK)	200 MHz	150 MHz	250 MHz	100 MHz	100 MHz	250 MHz	200 MHz	250 MHz	-	150 MHz
内存集成电路类型	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	-	OTHER FIFO
封装等效代码	BGA208,16X16,40	BGA208,16X16,40	BGA208,16X16,40	BGA208,16X16,40	BGA208,16X16,40	BGA208,16X16,40	BGA208,16X16,40	BGA208,16X16,40	-	BGA208,16X16,40
电源	1.5/2.5,2.5 V	1.5/2.5,2.5 V	1.5/2.5,2.5 V	1.5/2.5,2.5 V	1.5/2.5,2.5 V	1.5/2.5,2.5 V	1.5/2.5,2.5 V	1.5/2.5,2.5 V	-	1.5/2.5,2.5 V
最大待机电流	0.05 A	0.05 A	0.05 A	0.05 A	0.05 A	0.05 A	0.05 A	0.05 A	-	0.05 A
最大压摆率	0.06 mA	0.06 mA	0.06 mA	0.06 mA	0.06 mA	0.06 mA	0.06 mA	0.06 mA	-	0.06 mA
Base Number Matches	1	1	1	1	1	1	-	-	-	-

IDT72T40118L5BB

IDT72T40118L5BB概述

IDT72T40118L5BB规格参数

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IDT72T40118L5BB相似产品对比

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