Supports EDO page mode, read-modify-write and byte
write.
• Supports output buffer control using early write and
Output Enable (OE) control.
•
•
•
•
SANYO: SOJ40 II
Parameter
RAS access time
Column address access time
CAS access time
Cycle time
Power consumption (max)
During operation
During standby
LC321667BJ, BM, BT-70
70 ns
40 ns
25 ns
125 ns
688 mW
LC321667BJ, BM, BT-80
80 ns
45 ns
25 ns
135 ns
633 mW
5.5 mW (CMOS level)/11 mW (TTL level)
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
40695TH (OT) No. 5083-1/31
LC321667BJ, BM, BT-70/80
Package Dimensions
unit: mm
3195-SOP40
[LC321667BM]
Package Dimensions
unit: mm
3207-TSOP44 II
[LC321667BT]
SANYO: SOP40
SANYO: TSOP44 II
Pin AssignmentS
No. 5083-2/31
LC321667BJ, BM, BT-70/80
Block Diagram
Specifications
Absolute Maximum Ratings
Parameter
Maximum supply voltage
Input voltage
Output voltage
Operating temperature range
Storage temperature range
Allowable power dissipation
Output short-circuit current
LC321667BJ, BM-70/80
LC321667BT-70/80
Symbol
V
CC
max
V
IN
V
OUT
Topr
Tstg
Pd max
I
OUT
Ratings
–1.0 to +7.0
–1.0 to +7.0
–1.0 to +7.0
0 to +70
–55 to +150
800
700
50
Unit
V
V
V
°C
°C
mW
mA
Note
1
1
1
1
1
1
1
Note: 1. Stresses greater than the above listed maximum values may result in damage to the device.
DC Recommended Operating Ranges
at Ta = 0 to +70°C
Parameter
Power supply voltage
Input high level voltage
Input low level voltage
(A0 to A7, RAS, CAS, UW, LW, OE)
Input low level voltage (I/O1 to I/O16)
Symbol
V
CC
V
IH
V
IL
V
IL
min
4.5
2.4
–1.0
*1
–0.5
*1
typ
5.0
max
5.5
6.5
+0.8
+0.8
Unit
V
V
V
V
Note
2
2
2
2
Note: 2. All voltages are referenced to V
SS
.
A bypass capacitor of about 0.1 µF should be connected between V
CC
and V
SS
of the device.
*1:
–2.0 V when pulse width is less than 20 ns.
No. 5083-3/31
LC321667BJ, BM, BT-70/80
DC Electrical Characteristics
at Ta = 0 to +70°C, V
CC
= 5 V ± 10%
Parameter
Operating current
(Average current during operation)
Standby current
RAS-only refresh current
EDO page mode current
Standby current
CAS-before-RAS refresh current
Input leakage current
Output leakage current
Output high level voltage
Output low level voltage
Symbol
Conditions
LC321667
BJ, BM, BT-70
min
I
CC1
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
I
IL
I
OL
V
OH
V
OL
RAS, CAS, address cycling: t
RC
= t
RC
min
RAS = CAS = V
IH
RAS cycling, CAS = V
IH
: t
RC
= t
RC
min
RAS = V
IL
, CAS, address cycling: t
PC
= t
PC
min
RAS = CAS = V
CC
– 0.2 V
RAS, CAS cycling: t
RC
= t
RC
min
0 V
≤
V
IN
≤
6.5 V, pins other than
test pin = 0 V
D
OUT
disable, 0 V
≤
V
OUT
≤
5.5 V
I
OUT
= –2.5 mA
I
OUT
= 2.1 mA
–10
–10
2.4
0.4
max
125
2
125
110
1
125
+10
+10
–10
–10
2.4
0.4
LC321667
BJ, BM, BT-80
min
max
115
2
115
100
1
115
+10
+10
mA
mA
mA
mA
mA
mA
µA
µA
V
V
3
3, 5
3, 4, 5
3, 4, 5
Unit
Note
Note: 3. All current values are measured at minimum cycle rate. Since current flows immoderately, if cycle time is longer than shown here, current value
becomes smaller.
4. I
CC1
and I
CC4
are dependent on output loads. Maximum values for I
CC1
and I
CC4
represent values with output open.
5. Address change is less than or equal to one time during RAS = V
IL
. Concerning I
CC4
, it is less than or equal to one time during 1 cycle (t
PC
).
AC Electrical Characteristics
at Ta = 0 to +70°C, V
CC
= 5 V ± 10% (note 6, 7 and 8)
Parameter
Random read or write cycle time
Read-write/read-modify-write cycle time
EDO page mode cycle time
EDO page mode read-write/read-modify-write cycle time
RAS access time
CAS access time
Column address access time
CAS precharge access time
Output low-impedance time from CAS low
Output buffer turn-off delay time from RAS or CAS
Rise and fall time
RAS precharge time
RAS pulse width
RAS pulse width for EDO page mode cycle only
RAS hold time
CAS hold time
CAS pulse width
RAS to CAS delay time
RAS to column address delay time
CAS to RAS precharge time
CAS precharge time
Row address setup time
Row address hold time
Column address setup time
Column address hold time
Column address hold time referenced to RAS
Column address to RAS lead time
Read command setup time
Read command hold time referenced to CAS
Read command hold time referenced to RAS
Write command hold time
Write command hold time referenced to RAS
Write command pulse width
Symbol
t
RC
t
RWC
t
PC
t
PRWC
t
RAC
t
CAC
t
AA
t
CPA
t
CLZ
t
OFF
t
T
t
RP
t
RAS
t
RASP
t
RSH
t
CSH
t
CAS
t
RCD
t
RAD
t
CRP
t
CP
t
ASR
t
RAH
t
ASC
t
CAH
t
AR
t
RAL
t
RCS
t
RCH
t
RRH
t
WCH
t
WCR
t
WP
0
0
2.5
45
70
70
20
60
20
20
15
10
10
0
10
0
15
50
25
0
0
0
15
50
15
10000
45
30
10000
100000
20
50
LC321667BJ, BM, BT-70
min
125
170
35
85
70
25
40
45
0
0
2.5
45
80
80
25
70
25
20
15
10
10
0
10
0
15
55
30
0
0
0
15
55
15
10000
55
35
10000
100000
20
50
max
LC321667BJ, BM, BT-80
min
135
180
40
90
80
25
45
50
max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11
11
14
15
9, 14, 15
9, 14
9, 15
9
9
10, 17
Note
Continued on next page.
No. 5083-4/31
LC321667BJ, BM, BT-70/80
Continued from preceding page.
LC321667BJ, BM, BT-70
min
20
20
0
15
50
4
0
45
90
60
65
10
10
10
40
15
25
15
0
20
5
10
10
5
0
0
0
0
0
0
15
15
15
0
20
5
10
10
5
0
0
0
0
0
0
15
15
0
45
100
65
70
10
10
10
40
15
25
max
LC321667BJ, BM, BT-80
min
20
20
0
15
55
4
max
Parameter
Write command to RAS lead time
Write command to CAS lead time
Data input setup time
Data input hold time
Data input hold time referenced to RAS
Refresh time
Write command setup time
CAS to UW or LW delay time
RAS to UW or LW delay time
Column address to UW or LW delay time
CAS precharge UW or LW delay time for 70
EDO page mode cycle only
CAS setup time for CAS-before-RAS
CAS hold time for CAS-before-RAS
RAS precharge CAS active time
CAS precharge time for CAS-before-RAS counter test
RAS hold time referenced to OE
OE access time
OE delay time
OE output buffer turn-off delay time
OE command hold time
OE setup time to CAS high
OE hold time from CAS high
OE command pulse width
Data output hold time
WE output buffer turn-off delay time
Data input to CAS delay time
Data input to OE delay time
Masked write setup time
Masked write hold time referenced to RAS
Masked write hold time referenced to CAS
Symbol
t
RWL
t
CWL
t
DS
t
DH
t
DHR
t
REF
t
WCS
t
CWD
t
RWD
t
AWD
t
CPWD
t
CSR
t
CHR
t
RPC
t
CPT
t
ROH
t
OEA
t
OED
t
OEZ
t
OEH
t
OCH
t
CHO
t
OEP
t
DOH
t
WEZ
t
DZC
t
DZO
t
MCS
t
MRH
t
MCH
Unit
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
12
12
13
13
13
13
13
9
10
16
16
16
16
Input/Output Capacitance
at Ta = 25°C, f = 1 MHz, V
CC
= 5 V ± 10%
Parameter
Input capacitance (A0 to A7, RAS, CAS, UW, LW, OE)
Input/Output capacitance (I/O1 to I/O16)
Symbol
C
IN
C
I/O
min
max
7
7
Unit
pF
pF
Note
Note: 6. An initial pause of 200 µs is required after power-up followed by eight RAS-only refresh cycles before proper device operation is achieved. In case
of using refresh counter, a minimum of eight CAS-before-RAS refresh cycles instead of eight RAS-only refresh cycles are required.
7. Measured at t
T
= 2.5 ns.
8. When measuring input signal timing, V
IH
(min) and V
IL
(max) are used for reference points. In addition, rise and fall time are defined between V
IH
and V
IL
.
9. Measured using an equivalent of 50 pF and one standard TTL loads.
10. t
OFF
(max) and t
OEZ
(max) are defined as the time until output voltage can no longer be measured when output switches to a high impedance
condition.
11. Operation is guaranteed if either t
RRH
or t
RCH
is satisfied.
12. These parameters are measured from the falling edge of CAS for an early-write cycle, and from the falling edge of UW and LW for a read-
write/read-modify-write cycle.
13. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters for memory in that they specify the operating mode. If t
WCS
≥
t
WCS
(min), the cycle switches to an early-write cycle and output pins switch to high impedance throughout the cycle.
If t
CWD
≥
t
CWD
(min), t
RWD
≥
t
RWD
(min), t
AWD
≥
t
AWD
(min) and t
CPWD
≥
t
CPWD
(min) for fast page mode cycle only, the cycle switches to a
read-write/read-modify-write cycle and data output equal information in the selected cells. If neither of the above timings are satisfied, output pins
are in an undefined state.
14. t
RCD
(max) is not a restrictive operating parameter but instead represents the point at which the access time t
RAC
(max) is guaranteed. If t
RCD
≥
t
RCD
(max), access time is determined according to t
CAC
.
15. t
RAD
(max) is not a restrictive operating parameter but instead represents the point at which the access time t
RAC
(max) is guaranteed. If t
RAD
≥
t
RAD
(max), access time is determined according to t
AA
.
16. Operation is guaranteed if either t
DZC
or t
DZO
is satisfied.
17. t
OFF
is referenced from the rising edge of RAS or CAS, whichever occurs last.
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