PCA9551
8-bit I
2
C-bus LED driver with programmable blink rates
Rev. 08 — 31 July 2008
Product data sheet
1. General description
The PCA9551 LED blinker blinks LEDs in I
2
C-bus and SMBus applications where it is
necessary to limit bus traffic or free up the I
2
C-bus master's (MCU, MPU, DSP, chip set,
etc.) timer. The uniqueness of this device is the internal oscillator with two programmable
blink rates. To blink LEDs using normal I/O expanders like the PCF8574 or PCA9554, the
bus master must send repeated commands to turn the LED on and off. This greatly
increases the amount of traffic on the I
2
C-bus and uses up one of the master's timers.
The PCA9551 LED blinker instead requires only the initial set-up command to program
BLINK RATE 1 and BLINK RATE 2 (i.e., the frequency and duty cycle) for each individual
output. From then on, only one command from the bus master is required to turn each
individual open-drain output on, off, or to cycle at BLINK RATE 1 or BLINK RATE 2.
Maximum output sink current is 25 mA per bit and 100 mA per package.
Any bits not used for controlling the LEDs can be used for General Purpose parallel
Input/Output (GPIO) expansion.
The active LOW hardware reset pin (RESET) and Power-On Reset (POR) initializes the
registers to their default state, all zeroes, causing the bits to be set HIGH (LED off).
Three hardware address pins on the PCA9551 allow eight devices to operate on the same
bus.
The newer Fast-mode Plus PCA9634 8-bit LED controller offers an individual PWM
dimming control for each channel for better color mixing capabilities with a global PWM for
dimming or blinking all channels at the same time. There are 126 possible address
combinations and the maximum output sink current is 25 mA per bit and 200 mA per
package.
2. Features
I
8 LED drivers (on, off, flashing at a programmable rate)
I
2 selectable, fully programmable blink rates (frequency and duty cycle) between
0.148 Hz and 38 Hz (6.74 seconds and 0.026 seconds)
I
Input/outputs not used as LED drivers can be used as regular GPIOs
I
Internal oscillator requires no external components
I
I
2
C-bus interface logic compatible with SMBus
I
Internal power-on reset
I
Noise filter on SCL/SDA inputs
I
Active LOW reset input
I
8 open-drain outputs directly drive LEDs to 25 mA
I
Edge rate control on outputs
NXP Semiconductors
PCA9551
8-bit I
2
C-bus LED driver with programmable blink rates
I
I
I
I
I
I
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
I
Packages offered: SO16, TSSOP16, HVQFN16
3. Ordering information
Table 1.
Ordering information
T
amb
=
−
40
°
C to +85
°
C.
Type number
PCA9551D
PCA9551PW
PCA9551BS
Topside
mark
PCA9551D
PCA9551
9551
Package
Name
SO16
TSSOP16
HVQFN16
Description
plastic small outline package; 16 leads; body width 3.9 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 4
×
4
×
0.85 mm
Version
SOT109-1
SOT403-1
SOT629-1
4. Block diagram
A0
A1
A2
PCA9551
INPUT
REGISTER
I
2
C-BUS
CONTROL
SCL
SDA
INPUT
FILTERS
LED SELECT (LSn)
REGISTER
0
V
DD
RESET
1
PRESCALER 0
REGISTER
OSCILLATOR
V
SS
002aac504
POWER-ON
RESET
PWM0
REGISTER
PWM1
REGISTER
LEDn
BLINK0
BLINK1
PRESCALER 1
REGISTER
Only one I/O shown for clarity.
Fig 1.
Block diagram of PCA9551
PCA9551_8
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 08 — 31 July 2008
2 of 26
NXP Semiconductors
PCA9551
8-bit I
2
C-bus LED driver with programmable blink rates
5. Pinning information
5.1 Pinning
A0
A1
A2
LED0
LED1
LED2
LED3
V
SS
1
2
3
4
5
6
7
8
002aac500
16 V
DD
15 SDA
14 SCL
13 RESET
12 LED7
11 LED6
10 LED5
9
LED4
A0
A1
A2
LED0
LED1
LED2
LED3
V
SS
1
2
3
4
5
6
7
8
002aac501
16 V
DD
15 SDA
14 SCL
13 RESET
12 LED7
11 LED6
10 LED5
9
LED4
PCA9551D
PCA9551PW
Fig 2.
Pin configuration for SO16
16 A1
15 A0
terminal 1
index area
Fig 3.
13 SDA
14 V
DD
Pin configuration for TSSOP16
A2
LED0
LED1
LED2
1
2
12 SCL
11 RESET
PCA9551BS
3
4
5
6
7
8
10 LED7
9
LED6
LED3
V
SS
LED4
LED5
002aac502
Transparent top view
Fig 4.
Pin configuration for HVQFN16
5.2 Pin description
Table 2.
Symbol
A0
A1
A2
LED0
LED1
LED2
LED3
V
SS
LED4
LED5
LED6
PCA9551_8
Pin description
Pin
SO16, TSSOP16
1
2
3
4
5
6
7
8
9
10
11
HVQFN16
15
16
1
2
3
4
5
6
[1]
7
8
9
address input 0
address input 1
address input 2
LED driver 0
LED driver 1
LED driver 2
LED driver 3
supply ground
LED driver 4
LED driver 5
LED driver 6
© NXP B.V. 2008. All rights reserved.
Description
Product data sheet
Rev. 08 — 31 July 2008
3 of 26
NXP Semiconductors
PCA9551
8-bit I
2
C-bus LED driver with programmable blink rates
Pin description
…continued
Pin
SO16, TSSOP16
HVQFN16
10
11
12
13
14
LED driver 7
reset input (active LOW)
serial clock line
serial data line
supply voltage
12
13
14
15
16
Description
Table 2.
Symbol
LED7
RESET
SCL
SDA
V
DD
[1]
HVQFN16 package die supply ground is connected to both V
SS
pin and exposed center pad. V
SS
pin must
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
PCB in the thermal pad region.
6. Functional description
Refer to
Figure 1 “Block diagram of PCA9551”.
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9551 is shown in
Figure 5.
To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
slave address
1
1
0
0
A2
A1
A0 R/W
fixed
hardware
selectable
002aac505
Fig 5.
PCA9551 slave address
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9551, which will be stored in the Control register.
0
0
0
AI
0
B2
B1
B0
Auto-Increment flag
register address
002aac506
Reset state: 00h
Fig 6.
Control register
The lowest 3 bits are used as a pointer to determine which register will be accessed.
PCA9551_8
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 08 — 31 July 2008
4 of 26
NXP Semiconductors
PCA9551
8-bit I
2
C-bus LED driver with programmable blink rates
If the Auto-Increment (AI) flag is set, the three low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘000’ after the last register
is accessed.
When the Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the
sequence must start by reading a register different from ‘0' (B2 B1 B0
≠
000).
Only the 3 least significant bits are affected by the AI flag. Unused bits must be
programmed with zeroes.
6.2.1 Control register definition
Table 3.
B2
0
0
0
0
1
1
1
B1
0
0
1
1
0
0
1
Register summary
B0
0
1
0
1
0
1
0
Symbol
INPUT
PSC0
PWM0
PSC1
PWM1
LS0
LS1
Access
read only
read/write
read/write
read/write
read/write
read/write
read/write
Description
input register
frequency prescaler 0
PWM register 0
frequency prescaler 1
PWM register 1
LED0 to LED3 selector
LED4 to LED7 selector
6.3 Register descriptions
6.3.1 INPUT - Input register
The INPUT register reflects the state of the device pins. Writes to this register will be
acknowledged but will have no effect.
Table 4.
Bit
Symbol
Default
INPUT - Input register description
7
LED7
X
6
LED6
X
5
LED5
X
4
LED4
X
3
LED3
X
2
LED2
X
1
LED1
X
0
LED0
X
Remark:
The default value ‘X’ is determined by the externally applied logic level (normally
logic 1) when used for directly driving LED with pull-up to V
DD
.
6.3.2 PSC0 - Frequency Prescaler 0
PSC0 is used to program the period of the PWM output.
The period of BLINK0 = (PSC0 + 1) / 38.
Remark:
Prescaler calculation is different between the PCA9551 and other PCA955x
LED blinkers. A divider ratio of 38 instead of 44 is used. This different divider ratio causes
the blinking frequency to be 13 % (1
−
38 / 44) lower when the same 8-bit word is used.
The programmed value of Frequency Prescaler 0 must be adjusted to compensate for this
difference in applications where the PCA9551 is used in conjunction with other PCA955x
LED blinkers and the observed blinking frequencies need to be the same.
PCA9551_8
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 08 — 31 July 2008
5 of 26
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