CLK1/nCLK1 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
Maximum output frequency: 266MHz
Crystal frequency range: 14MHz - 40MHz
Output skew: 60ps (typical)
Part-to-part skew: 450ps (typical
Propagation delay: 2.25ns (typical)
Full 3.3V or 2.5V supply modes
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
General Description
The ICS8546-01 is a low skew, high performance
1-to-6 Crystal Oscillator-to-LVDS Fanout Buffer and
HiPerClockS™
a member of the HiPerClockS™ family of High
Performance Clock Solutions from IDT. The
ICS8546-01 has selectable crystal, single ended or
differential clock inputs. The single-ended clock input accepts
LVCMOS or LVTTL input levels and translate them to LVDS levels.
The CLK1, nCLK1 pair can accept most standard differential input
levels. The output enable is internally synchronized to eliminate
runt pulses on the outputs during asynchronous assertion/
deassertion of the clock enable pin.
ICS
Guaranteed output and part-to-part skew characteristics make the
ICS8546-01 ideal for those applications demanding well defined
performance and repeatability.
Block Diagram
CLK_EN
Pullup
D
Q
CLK_SEL0
Pulldown
CLK_SEL1
Pulldown
LE
Pin Assignment
nQ2
Q2
V
DDO
nQ1
Q1
GND
nQ0
Q0
CLK_SEL0
XTAL_IN
XTAL_OUT
CLK_EN
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Q3
nQ3
V
DDO
Q4
nQ4
V
DD
Q5
nQ5
CLK_SEL1
nCLK1
CLK1
CLK0
XTAL_IN
Q0
OSC
XTAL_OUT
CLK0
Pulldown
CLK1
nCLK1
Pullup
Pulldown
00
nQ0
6 LVDS Outputs
01
ICS844S0258-07
Q5
nQ5
1X
24-Lead TSSOP
4.4mm x 7.8mm x 0.925mm package body
G Package
Top View
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™
LVDS FANOUT BUFFER
1
ICS8546AG-01 REV. B APRIL 16, 2008
ICS8546-01
LOW SKEW, 1-TO-6, CRYSTAL-TO-LVDS FANOUT BUFFER
PRELIMINARY
Table 1. Pin Descriptions
Number
1, 2
3, 22
4, 5
6
7, 8
9,
16
10,
11
12
13
14
15
17, 18
19
20, 21
23, 24
Name
nQ2, Q2
V
DDO
nQ1, Q1
GND
nQ0, Q0
CLK_SEL0,
CLK_SEL1
XTAL_IN,
XTAL_OUT
CLK_EN
CLK0
CLK1
nCLK1
nQ5, Q5
V
DD
nQ4, Q4
nQ3, Q3
Output
Power
Output
Power
Output
Input
Input
Pulldown
Type
Description
Differential output pair. LVDS interface levels.
Output supply pins.
Differential output pair. LVDS interface levels.
Power supply ground.
Differential output pair. LVDS interface levels.
Clock select pins. LVCMOS/LVTTL interface levels.
Parallel resonant crystal interface.
XTAL_OUT is the output, XTAL_IN is the input.
Pullup
Pulldown
Pulldown
Pullup
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
When LOW, the outputs are disabled. LVCMOS / LVTTL interface levels.
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