Silicon MOS FETs (Small Signal)
2SK0615
(2SK615)
Silicon N-Channel MOS FET
For switching
Unit: mm
I
Features
M
Di ain
sc te
on na
tin nc
ue e/
d
(0.4)
2.0
±0.2
G
Low ON-resistance
G
High-speed switching
G
Allowing to be driven directly by CMOS and TTL
G
M type package, allowing easy automatic and manual insertion as
well as stand-alone fixing to the printed circuit board.
6.9
±0.1
(1.5)
(1.5)
2.5
±0.1
(1.0)
(1.0)
3.5
±0.1
R 0.9
R 0.7
I
Absolute Maximum Ratings
(Ta = 25°C)
Parameter
Symbol
Drain to Source voltage
Gate to Source voltage
Drain current
V
DS
I
D
Ratings
80
20
Unit
V
V
A
A
1.0
±0.1
(0.85)
2.4
±0.2
0.45
±0.05
Max drain current
Allowable power dissipation
Channel temperature
Storage temperature
*
PC board: Copper foil of the drain portion should have a area of 1cm
2
or
more and the board thickness should be 1.7mm.
I
Electrical Characteristics
(Ta = 25°C)
Parameter
Symbol
Drain to Source cut-off current
Gate to Source leakage current
I
DSS
I
GSS
V
th
Drain to Source breakdown voltage
Gate threshold voltage
Drain to Source ON-resistance
Forward transfer admittance
Input capacitance (Common Source) C
iss
Output capacitance (Common Source)
Pl
Reverse transfer capacitance (Common Source) C
rss
Turn-on time
Turn-off time
*1
*2
Pulse measurement
t
on
, t
off
measurement circuit
V
out
V
in
= 10V
68Ω
V
DD
= 30V
V
out
V
in
10%
V
in
10%
90%
t = 1µ
S
f = 1MH
Z
50Ω
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V
GSO
I
DP
±0.5
±1
1
1
2
3
(2.5)
(2.5)
1.25
±0.05
0.55
±0.1
P
D *
T
ch
T
stg
W
150
°C
°C
1: Source
2: Drain
3: Gate
EIAJ: SC-71
M-A1 Package
−55
to +150
Conditions
min
typ
max
10
Unit
µA
µA
V
V
V
DS
= 60V, V
GS
= 0
V
GS
= 20V, V
DS
= 0
0.1
V
DSS
I
DS
= 100µA, V
GS
= 0
I
D
= 1mA, V
DS
= V
GS
I
D
= 0.5A, V
GS
= 10V
80
1.5
3.5
4
R
DS(on)
| Y
fs
|
C
oss
*1
2
I
D
= 0.2A, V
DS
= 15V, f = 1kHz
V
DS
= 10V, V
GS
= 0, f = 1MHz
300
45
30
8
mS
pF
pF
pF
ns
ns
t
on*1, 2
t
off
*1, 2
15
20
90% V
out
t
on
t
off
Note) The part number in the parenthesis shows conventional part number.
4.1
±0.2
4.5
±0.1
Ω
1
Silicon MOS FETs (Small Signal)
P
D
Ta
1.6
1.2
Copper foil of the drain portion
should have a area of 1cm
2
or more and the board
thickness should be 1.7mm.
Ta=25˚C
1.0
V
GS
=5.5V
1.0
2SK0615
I
D
V
DS
1.2
V
DS
=10V
Ta=25˚C
I
D
V
GS
Allowable power dissipation P
D
(W)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
Drain current I
D
(A)
0.8
5V
Drain current I
D
(A)
0.8
0.6
4.5V
0.6
M
Di ain
sc te
on na
tin nc
ue e/
d
0.4
0.4
3.5V
3V
0.2
0.2
0
0
0
20
40
60
80 100 120 140 160
0
2
4
6
8
10
0
2
4
6
4V
8
10
Ambient temperature Ta (˚C)
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
Input capacitance (Common source), Output capacitance (Common source),
Reverse transfer capacitance (Common source) C
iss
,C
oss
,C
rss
(pF)
Forward transfer admittance |Y
fs
| (mS)
500
V
DS
=15V
f=1kHz
Ta=25˚C
100
V
GS
=0
f=1MHz
Ta=25˚C
Drain to source ON-resistance R
DS(on)
(
Ω
)
600
400
300
200
100
0
0
1
2
3
4
5
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120
6
5
80
4
60
3
Ta=75˚C
40
C
iss
2
25˚C
20
1
–25˚C
C
oss
C
rss
0
0
6
1
3
10
30
100
300
1000
0
4
8
12
16
| Y
fs
|
V
GS
C
iss
, C
oss
, C
rss
V
DS
R
DS(on)
V
GS
I
D
=500mA
20
Gate to source voltage V
GS
(V)
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
R
DS(on)
Ta
Drain to source ON-resistance R
DS(on)
(
Ω
)
6
I
D
=500mA
5
4
3
V
GS
=5V
10V
2
1
0
–50
–25
0
25
Ambient temperature Ta (˚C)
2
Pl
50
75
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semiconductors described in this book
(1)
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Consult our sales staff in advance for information on the following applications:
–
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Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
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