Datasheet> 器件分类 > 嵌入式处理器和控制器> 微控制器和处理器> 5962-9760701MXC

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5962-9760701MXC: 产品描述RISC Microprocessor, 32-Bit, 25MHz, CMOS, CPGA241, CERAMIC, PGA-241; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小999KB，共83页; 制造商Atmel (Microchip)

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5962-9760701MXC概述

RISC Microprocessor, 32-Bit, 25MHz, CMOS, CPGA241, CERAMIC, PGA-241

5962-9760701MXC规格参数

参数名称	属性值
是否Rohs认证	不符合
零件包装代码	PGA
包装说明	PGA, PGA241M,18X18
针数	241
Reach Compliance Code	unknown
ECCN代码	3A001.A.2.C
地址总线宽度	32
位大小	32
边界扫描	YES
最大时钟频率	25 MHz
外部数据总线宽度	32
格式	FIXED POINT
集成缓存	NO
JESD-30 代码	S-CPGA-P241
JESD-609代码	e4
长度	47.245 mm
低功率模式	YES
端子数量	241
最高工作温度	125 °C
最低工作温度	-55 °C
封装主体材料	CERAMIC, METAL-SEALED COFIRED
封装代码	PGA
封装等效代码	PGA241M,18X18
封装形状	SQUARE
封装形式	GRID ARRAY
电源	5 V
认证状态	Not Qualified
筛选级别	MIL-STD-883
座面最大高度	4.96 mm
速度	25 MHz
最大供电电压	5.25 V
最小供电电压	4.75 V
标称供电电压	5 V
表面贴装	NO
技术	CMOS
温度等级	MILITARY
端子面层	Gold (Au)
端子形式	PIN/PEG
端子节距	2.54 mm
端子位置	PERPENDICULAR
宽度	47.245 mm
uPs/uCs/外围集成电路类型	MICROPROCESSOR, RISC
Base Number Matches	1

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Features

•

CPU32+ Processor (4.5 MIPS at 25 MHz)

– 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32)

– Background Debug Mode

– Byte-misaligned Addressing

Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

Up to 32 Address Lines (At Least 28 Always Available)

Complete Static Design (0 - 25 MHz Operation)

Slave Mode to Disable CPU32+ (Allows Use with External Processors)

– Multiple QUICCs Can Share One System Bus (One Master)

– TS68040 Companion Mode Allows QUICC to be a TS68040 Companion Chip and

Intelligent Peripheral (22 MIPS at 25 MHz)

– Peripheral Device of TSPC603e (see DC415/D note)

Four General-purpose Timers

– Superset of MC68302 Timers

– Four 16-bit Timers or Two 32-bit Timers

– Gate Mode Can Enable/Disable Counting

Two Independent DMAs (IDMAs)

System Integration Module (SIM60)

Communications Processor Module (CPM)

Four Baud Rate Generators

Four SCCs (Ethernet/IEEE 802.3 Optional on SCC1-Full 10 Mbps Support)

Two SMC

= +5V ± 5%

max

= 25 MHz and 33 MHz

Military Temperature Range: -55°C < T

< +125°C

= 1.4W at 25 MHz; 5.25V

2W at 33 MHz; 5.25V

•

32-bit Quad

Integrated

Communication

Controller

TS68EN360

•

Description

The TS68EN360 QUad Integrated Communication Controller (QUICC

™

) is a versatile

one-chip integrated microprocessor and peripheral combination that can be used in a

variety of controller applications. It particularly excels in communications activities.

The QUICC (pronounced “quick”) can be described as a next-generation TS68302

with higher performance in all areas of device operation, increased flexibility, major

extensions in capability, and higher integration. The term “quad” comes from the fact

that there are four serial communications controllers (SCCs) on the device; however,

there are actually seven serial channels: four SCCs, two serial management control-

lers (SMCs), and one serial peripheral interface (SPI).

Screening/Quality

This product is manufactured in full compliance with:

•

QML (class Q)

•

or according to Atmel standards

2113B–HIREL–06/05

5962-9760701MXC

5962-9760701MXC概述

5962-9760701MXC规格参数

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