DATASHEET
HCTS32MS
Radiation Hardened Quad 2-Input OR Gate
FN2248
Rev 2.00
September 1995
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x
• Dose Rate Upset >10
10
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
GND 7
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
10
12
RAD (Si)/s
RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii
5A @ VOL, VOH
A1
B1
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
Description
The Intersil HCTS32MS is a Radiation Hardened Quad 2-
Input OR Gate. A Low on all inputs forces the output to a
Low state.
The HCTS32MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS32MS is supplied in a 14 lead Ceramic flatpack (K
suffix) or a SBDIP Package (D suffix).
Y1
A2
B2
Y2
GND
Functional Diagram
An
(1, 4, 9, 12)
Yn
Ordering Information
PART
NUMBER
HCTS32DMSR
HCTS32KMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Bn
(3, 6, 8, 11)
PACKAGE
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
Die
(2, 5, 10, 13)
TRUTH TABLE
INPUTS
An
L
L
H
H
Bn
L
H
L
H
OUTPUTS
Yn
L
H
H
H
HCTS32D/
Sample
HCTS32K/
Sample
HCTS32HMSR
+25
o
C
+25
o
C
FN2248 Rev 2.00
September 1995
Page 1 of 8
DB NA
+25
o
C
NOTE: L = Logic Level Low, H = Logic level High
Die
HCTS32MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
10mA
DC Drain Current, Any One Output
25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
JA
JC
o
SBDIP Package. . . . . . . . . . . . . . . . . . . .
74 C/W
24
o
C/W
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 116
30
o
C/W
o
C Ambient
Maximum Package Power Dissipation at +125
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . 100ns/V Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
(Note 3)
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V (Note 3)
VCC = 4.5V, VIH = 2.25V,
IOL = 50A, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50A, VIL = 0.8V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50A, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50A, VIL = 0.8V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
4.8
4.0
-4.8
-4.0
-
MAX
10
200
-
-
-
-
0.1
UNITS
A
A
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Current
(Source)
IOH
Output Voltage Low
VOL
1, 2, 3
-
0.1
V
1, 2, 3
VCC
-0.1
VCC
-0.1
-
-
-
-
V
1, 2, 3
-
V
1
2, 3
0.5
5.0
-
A
A
-
Noise Immunity
Functional Test
NOTES:
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages reference to device GND.
2. For functional tests VO
4.0V
is recognized as a logic “1”, and VO
0.5V
is recognized as a logic “0”.
3. Force/Measure functions may be interchanged.
FN2248 Rev 2.00
September 1995
Page 2 of 8
HCTS32MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
Input to Output
TPLH
VCC = 4.5V
9
10, 11
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input tr = tf = 3ns, VIL = GND, VIH = 3V.
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
MAX
18
20
20
22
UNITS
ns
ns
ns
ns
PARAMETER
Input to Output
SYMBOL
TPHL
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, f = 1MHz
NOTES
1
1
Input Capacitance
CIN
VCC = 5.0V, f = 1MHz
1
1
Output Transition
Time
TTHL
TTLH
VCC = 4.5V
1
1
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C
+25
o
C
+125
o
C
MIN
-
-
-
-
-
-
MAX
30
45
10
10
15
22
UNITS
pF
pF
pF
pF
ns
ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
Quiescent Current
Output Current (Sink)
SYMBOL
ICC
IOL
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V and 5.5V,
VIH = VCC/2, VIL = 0.8V , IOL = 50A
VCC = 4.5V and 5.5V,
VIH = VCC/2, VIL = 0.8V, IOH = -50A
VCC = 5.5V, VIN = VCC or GND
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
4.0
MAX
0.2
-
UNITS
mA
mA
Output Current
(Source)
Output Voltage Low
IOH
-4.0
-
mA
VOL
-
0.1
V
Output Voltage High
VOH
VCC
-0.1
-
-
V
Input Leakage Current
IIN
5
A
FN2248 Rev 2.00
September 1995
Page 3 of 8
HCTS32MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
200K RAD
LIMITS
PARAMETER
Noise Immunity
Functional Test
Input to Output
SYMBOL
FN
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
VCC = 4.5V
VCC = 4.5V
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
MIN
-
MAX
-
UNITS
-
TPHL
TPLH
2
2
20
22
ns
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO
4.0V
is recognized as a logic “1”, and VO
0.5V
is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
GROUP B
SUBGROUP
5
5
PARAMETER
ICC
IOL/IOH
DELTA LIMIT
3A
-15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
Interim Test
I
(Postburn-In)
Interim Test
II
(Postburn-In)
PDA
Interim Test
III
(Postburn-In)
PDA
Final Test
Group A (Note 1)
Group B
Subgroup B-5
Subgroup B-6
Group D
NOTE:
1. Alternate group A inspection in accordance with method 5005 of MIL-STD-883 may be exercised.
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
Sample/5005
Sample/5005
GROUP A SUBGROUPS
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9, Deltas
1, 7, 9
1, 7, 9, Deltas
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
1, 7, 9
Subgroups 1, 2, 3, 9, 10, 11
ICC, IOL/H
READ AND RECORD
ICC, IOL/H
ICC, IOL/H
ICC, IOL/H
FN2248 Rev 2.00
September 1995
Page 4 of 8
HCTS32MS
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
Group E Subgroup 2
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
METHOD
5005
PRE RAD
1, 7, 9
POST RAD
Table 4
READ AND RECORD
PRE RAD
1, 9
POST RAD
Table 4 (Note 1)
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V
0.5V
VCC = 6V
0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
3, 6, 8, 11
1, 2, 4, 5, 7, 9, 10,
12, 13
-
14
-
-
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
3, 6, 8, 11
7
-
1, 2, 4, 5, 9, 10, 12,
13, 14
-
-
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
-
7
3, 6, 8, 11
14
1, 2, 4, 5, 9, 10, 12,
13
-
NOTES:
1. Each pin except VCC and GND will have a resistor of 10k
5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 1k
5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
3, 6, 8, 11
GROUND
7
VCC = 5V
0.5V
1, 2, 4, 5, 9, 10, 12, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K
5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
FN2248 Rev 2.00
September 1995
Page 5 of 8
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