®
HIGH-PERFORMANCE
CMOS BUS
TRANSCEIVERS
DESCRIPTION:
IDT54/74FCT861A/B
IDT54/74FCT863A/B
Integrated Device Technology, Inc.
FEATURES:
• Equivalent to AMD’s Am29861-64 bipolar registers in
pinout/function, speed and output drive over full tempera-
ture and voltage supply extremes
• IDT54/74FCT861A/863A equivalent to FAST™ speed
• IDT54/74FCT861B/863B 25% faster than FAST
• High-speed symmetrical bidirectional transceivers
• I
OL
= 48mA (commercial) and 32mA (military)
• Clamp diodes on all inputs for ringing suppression
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
• Substantially lower input current levels than AMD’s
bipolar Am29800 Series (5µA max.)
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
The IDT54/74FCT800 series is built using an advanced
dual metal CMOS technology.
The IDT54/74FCT860 series bus transceivers provide
high-performance bus interface buffering for wide
data/address paths or buses carrying parity. The
IDT54/74FCT863 9-bit transceivers have NAND-ed output
enables for maximum control flexibility.
All of the IDT54/74FCT800 high-performance interface
family are designed for high-capacitance load drive capability
while providing low-capacitance bus loading at both inputs
and outputs. All inputs have clamp diodes and all outputs are
designed for low-capacitance bus loading in the high- im-
pedance state.
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT861
IDT54/74FCT863
T
0
T
1
- T
9
OER
T
0
T
1
- T
8
OER
1
OER
2
R
0
R
1
- R
9
OET
R
0
R
1
- R
8
OET
1
OET
2
2610 drw 01
PRODUCT SELECTOR GUIDE
Device
10-Bit
Non-inverting
IDT54/74FCT861
9-Bit
IDT54/74FCT863
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1994
Integrated Device Technology, Inc.
APRIL 1994
DSC-4620/3
7.23
1
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT861 10-BIT TRANSCEIVERS
INDEX
OER
R
0
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
R
9
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
P24-1,
D24-1,
E24-1
&
SO24-2
21
20
19
18
17
16
15
14
13
DIP/CERPACK/SOIC
TOP VIEW
IDT54/74FCT863 9-BIT TRANSCEIVERS
INDEX
OER
1
R
0
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
OER
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
P24-1,
D24-1,
E24-1
&
SO24-2
21
20
19
18
17
16
15
14
13
R
8
OER
2
GND
NC
OET
1
OET
2
T
8
Vcc
T
0
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
OET
2
OET
1
R
2
R
3
R
4
NC
R
5
R
6
R
7
R
1
R
0
OER
NC
Vcc
T
0
T
1
4
5
6
7
8
9
10
3
2
1
28 27 26
25
24
23
22
21
20
R
8
R
9
GND
NC
OET
T
9
T
8
LCC
TOP VIEW
Vcc
T
0
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
T
9
OET
R
2
R
3
R
4
NC
R
5
R
6
R
7
R
1
R
0
OER
NC
Vcc
T
0
T
1
4
5
6
7
8
9
10
3
2
1
28 27 26
25
24
23
22
21
20
L28-1
11
19
12 13 14 15 16 17 18
T
2
T
3
T
4
NC
T
5
T
6
T
7
L28-1
11
19
12 13 14 15 16 17 18
T
2
T
3
T
4
NC
T
5
T
6
T
7
2610 drw 02
DIP/CERPACK/SOIC
TOP VIEW
LCC
TOP VIEW
LOGIC SYMBOLS
IDT54/74FCT861
IDT54/74FCT863
OET
OET
1
OET
2
10
10
R
T
R
9
9
T
OER
OER
1
OER
2
2610 drw 03
7.23
2
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Name
I/O
I
I
I/O
I/O
I
I
I/O
I/O
Description
When LOW in conjunction with
OET
HIGH
activates the RECEIVE mode.
When LOW in conjunction with
OER
HIGH
activates the TRANSMIT mode.
10-bit RECEIVE input/output.
10-bit TRANSMIT input/output.
When LOW in conjunction with
OET
I
HIGH
activates the RECEIVE mode.
When LOW in conjunction with
OER
I
HIGH
activates the TRANSMIT mode.
9-bit RECEIVE input/output.
9-bit TRANSMIT input/output.
2610 tbl 01
FUNCTION TABLE
(1)
IDT54/74FCT861/863 (Non-inverting)
Inputs
Outputs
T
I
N/A
N/A
L
H
X
R
I
N/A
N/A
L
H
Z
T
I
L
H
N/A
N/A
Z
Function
Transmitting
Transmitting
Receiving
Receiving
High Z
IDT54/74FCT861
OER
OET
R
I
T
I
OET OER
L
L
H
H
H
H
H
L
L
H
R
I
L
H
N/A
N/A
X
IDT54/74FCT863
OER
I
OET
I
R
I
T
I
NOTE:
2610 tbl 02
1. H = HIGH, L = LOW, Z = High Impedance, X = Don’t Care, N/A = Not
Applicable.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
(2)
V
TERM
Terminal Voltage
with Respect
to GND
(3)
V
TERM
Terminal Voltage
with Respect
to GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
P
T
Power Dissipation
DC Output Current
I
OUT
Commercial
Military
Unit
–0.5 to +7.0 –0.5 to +7.0
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions Typ.
V
IN
= 0V
V
OUT
= 0V
6
8
Max.
10
12
Unit
pF
pF
–0.5 to V
CC
–0.5 to V
CC
V
NOTE:
2610 tbl 04
1. This parameter is guaranteed by characterization but not tested.
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
NOTES:
2610 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
CC
by +0.5V unless otherwise noted.
2. Inputs and V
CC
terminals only.
3. Outputs and I/O terminals only.
7.23
3
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V, V
H
C
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(Except I/O pins)
Input LOW Current
(Except I/O pins)
Input HIGH Current
(I/O pins Only)
Input LOW Current
(I/O pins Only)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max. , V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
I
OH
= –300µA
I
OH
= –15mA MIL.
I
OH
= –24mA COM’L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µA
I
OL
= 32mA MIL.
(5)
(3)
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
Min.
2.0
—
—
—
—
—
—
—
—
—
—
–75
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
15
15
(4)
–15
(4)
–15
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.5
0.5
Unit
V
V
µA
µA
V
mA
V
V
I
OL
= 48mA COM’L.
(5)
NOTES:
2610 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. These are maximum I
OL
values per output, for 10 outputs turned on simultaneously. Total maximum I
OL
(all outputs) is 480mA for commercial and 320mA
for military. Derate I
OL
for number of outputs exceeding 10 turned on simultaneously.
7.23
4
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power
Supply Current
Quiescent Power Supply
Current TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max., Outputs Open
OER
or
OET
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
f
i
= 10MHz
50% Duty Cycle
V
IN
≥
V
HC
V
IN
≤
V
LC
Min.
—
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2.0
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4.0
mA
OER
or
OET
= GND
One Bit Toggling
V
CC
= Max., Outputs Open
f
i
= 2.5MHz
50% Duty Cycle
—
—
2.0
3.2
5.0
6.5
(5)
OER
or
OET
= GND
Eight Bits Toggling
—
5.2
14.5
(5)
2610 tbl 06
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
7.23
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
