IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
OCTAL BUS TRANSCEIVER
(OPEN DRAIN)
Integrated Device Technology, Inc.
IDT54/74FCT621T/AT
FEATURES:
•
•
•
•
Std. and A speed grades
Low input and output leakage
≤1µA
(max.)
CMOS power levels
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
Power off disable outputs permit “live insertion”
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, CERPACK and LCC packages
DESCRIPTION:
The IDT54/74FCT621T/AT is an octal transceiver with
non-inverting Open-Drain bus compatible outputs in both
send and receive directions. The B bus outputs are capable
of sinking 64mA providing very good capacitive drive
characteristics. These octal bus transceivers are designed for
asynchronous two-way communication between data buses.
The control function implementation allows for maximum
flexibility in timing.
•
•
•
•
•
FUNCTIONAL BLOCK DIAGRAM
(1)
PIN CONFIGURATIONS
GAB
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GBA
GAB
P20-1,
D20-1,
SO20-2
&
E20-1
A
1
B
1
Vcc
GBA
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
2538 drw 02
DIP/SOIC/CERPACK
TOP VIEW
INDEX
A
2
–A
8
B
2
–B
8
7 Other Transceivers
2538 drw 01
A
3
A
4
A
5
A
6
A
7
A
2
A
1
GAB
Vcc
GBA
3
4
5
6
7
8
2
20 19
18
1
17
16
15
14
9 10 11 12 13
L20-2
B
1
B
2
B
3
B
4
B
5
2538 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integreted Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995
Integrated Device Technology, Inc.
A
8
GND
B
8
B
7
B
6
APRIL 1994
DSC-4222/4
6.18
6.18
1
1
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
FUNCTION TABLE
(1)
Description
G
BA, GAB
A
1
– A
8
B
1
– B
8
Pin Names
Enable Inputs
G
BA
2538 tbl 01
Enable Inputs
GAB
L
H
L
H
Function
B data to A bus
A data to B bus
OFF
B data to A bus
A data to B bus
A Inputs or Open-drain Outputs
B Inputs or Open-drain Outputs
L
H
H
L
NOTE:
2538 tbl 02
1. H = HIGH Voltage Level.
L = LOW Voltage Level.
OFF = HIGH if pull-up resistor is connected to Open-Drain output.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
(2)
Terminal Voltage
V
TERM
–0.5 to +7.0
with Respect to
GND
V
TERM(3)
Terminal Voltage
–0.5 to
with Respect to
V
CC
+0.5
GND
T
A
Operating
0 to +70
Temperature
T
BIAS
Temperature
–55 to +125
Under Bias
T
STG
Storage
–55 to +125
Temperature
P
T
Power Dissipation
0.5
I
OUT
DC Output
Current
–60 to +120
Military
–0.5 to +7.0
Unit
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max. Unit
10
pF
12
pF
–0.5 to
V
CC
+0.5
–55 to +125
–65 to +135
–65 to +150
0.5
–60 to +120
V
°
C
°
C
°
C
W
mA
2538 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
2538 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
6.18
2
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OH
V
OL
V
OL
I
OFF
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(5)
Input LOW Current
(5)
Input HIGH Current
(5)
Clamp Diode Voltage
Output HIGH Current
Output LOW Voltage
(B Bus)
Output LOW Voltage
(A Bus)
Input/Output Power Off
Leakage
(5)
Input Hysteresis
Quiescent Power Supply
Current
NOTES:
2538 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. These are maximum I
OL
values per output, for 8 outputs turned on simultaneously. Total maximum I
OL
(all outputs) is 512mA for commercial and
384mA for military. Derate I
OL
for number of outputs exceeding 8 turned on simultaneously.
4. The test limit for this parameter is
±5µA
at T
A
= –55°C.
5. This parameter is guaranteed but not tested.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max., V
I
= 2.7V
V
CC
= Max., V
I
= 0.5V
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
or V
O
≤
4.5V
—
V
CC
= max., V
IN
= GND or Vcc
I
OL
= 48mA MIL.
(4)
I
OL
= 64mA COM’L.
I
OL
= 32mA MIL.
(4)
I
OL
= 48mA COM’L.
V
OH
= Vcc (Max.)
Min.
2.0
—
—
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
–0.7
—
0.3
0.3
—
200
0.01
Max.
—
0.8
±1
±1
±1
–1.2
20
0.55
0.5
±1
—
1
Unit
V
V
µA
µA
µA
V
µA
V
V
µA
mV
mA
6.18
3
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
Vcc = Max.
Outputs Open
G
BA = GAB = GND or V
CC
One Input Toggling
50% Duty Cycle
Vcc = Max.
Outputs Open
G
BA = GAB = GND or V
CC
One Bit Toggling
at f
i
=10MHz
50% Duty Cycle
Vcc = Max.
Outputs Open
G
BA = GAB = GND or V
CC
Eight Bits Toggling
at f
i
= 2.5MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2.0
0.25
Unit
mA
mA/MHz
I
C
Total Power Supply Current
(6,7)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
3.5
mA
—
1.8
4.5
—
3.0
6.0
(5)
14.0
(5)
—
5.0
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
7. This test is performed with outputs tied to GND through a pull-down resistor.
2538 tbl 06
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT621T
Com’l.
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
IDT54/74FCT621AT
Com’l.
5.5
1.5
5.5
1.5
5.5
1.5
5.5
1.5
12.0
6.8
12.0
6.4
13.0
6.8
13.0
6.4
5.5
1.5
5.5
1.5
5.5
1.5
5.5
1.5
Mil.
12.5
7.6
12.5
7.2
13.5
7.6
13.5
7.2
2538 tbl 07
Mil.
5.5
1.5
5.5
1.5
5.5
1.5
5.5
1.5
13.5
9.5
13.0
9.0
14.5
9.5
14.5
9.0
Parameter
Propagation Delay A to B
Propagation Delay B to A
Propagation Delay
G
BA to A
Propagation Delay GAB to B
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
5.5
1.5
5.5
1.5
5.5
1.5
5.5
1.5
13.0
8.5
12.5
8.0
14.0
8.5
14.0
8.0
Max. Min.
(2)
Max. Unit
ns
ns
ns
ns
6.18
4
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
2538 drw 03
SWITCH POSITION
Test
7.0V
Switch
Open Drain
Disable Low
Enable Low
All Other Tests
Closed
V
OUT
Open
500
Ω
2538 lnk 08
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2538 drw 04
PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
t
REM
1.5V
2538 drw 05
t
SU
t
H
PROPAGATION DELAY
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
2538 drw 06
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
1.5V
0V
3.5V
1.5V
t
PHZ
0.3V
V
OH
0V
2538 drw 07
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
t
PLZ
1.5V
0V
3.5V
0.3V
V
OL
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
6.18
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
