Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MMA6910KQ
Rev. 2, 10/2015
MMA6910KQ, High-Accuracy, Low-g,
Inertial Sensor
MEMS Sensing, State Machine ASIC
The MMA6910KQ, a SafeAssure solution, is a dual axis, low-g, XY, sensor
based on Freescale’s HARMEMS technology, with an embedded Digital Signal
Processor (DSP) ASIC, allowing for additional processing of the digital signals.
MMA6910KQ
Bottom view
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Sensitivity in X and Y axes
±3.5
g full-scale range per axis
AEC-Q100 qualified, Rev. F, grade 2 (-40
≤
T
A
≤
105 °C)
50 Hz second order low-pass filter
Unsigned 11-bits digital data output
SPI-compatible serial interface
Capture/hold input for system-wide synchronization support
3.3 or 5.0 V single supply operation
On-chip temperature sensor and voltage regulator
PCM_X
C
REGA
C
REGA
16-PIN QFN
CASE 98ASA10571D
Top view
Minimal external component requirements
Pb-free 16-pin QFN package
Pulse-code modulated output available for device evaluation
With a ±3.5 g full-scale range, the newly designed, high-accuracy sensor,
enables Electronic Stability Control (ESC) designers to accommodate
higher original signal noise level without sacrificing resolution.
Tilt measurement
Electronic parking brake
Ordering information
Device name
Range
±3.5 g
±3.5 g
Shipping
Tray
Tape and Reel
C
REF
1
C
REF
2
V
CC
3
V
SS
4
16 15 14 13
V
SSA
12 PCM_Y
11 CAP/HOLD
10 D
IN
9 V
PP
8
C
REG
Bidirectional internal self-test
Typical applications
5
D
OUT
6
SCLK
7
CS/RESET
•
•
Pin connections
MMA6910KQ
MMA6910KQR2
© 2012, 2015 Freescale Semiconductor, Inc. All rights reserved.
Contents
1
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Serial communication configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 External components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
3
3
4
7
2
Internal Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Data array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Voltage regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3 Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.4 CREG monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5 Clock monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6 Internal reset controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.7 Control logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.8 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.9 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.10 Self-test interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.11 SD converters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.12 Digital signal processing block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Exception conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Communications protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 CAP/HOLD input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
20
25
26
3
4
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.1 Startup reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2 Device initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Performance Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Control timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
28
28
28
29
31
5
6
Package Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Appendix A Digital Filter Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
A.1 Sinc filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
A.2 Low-pass filter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Related Documentation
The MMA6910KQ device features and operations are described in a variety of reference manuals, user guides, and application
notes. To find the most-current versions of these documents:
1.
2.
3.
Go to the Freescale homepage at:
http://www.freescale.com/
In the Keyword search box at the top of the page, enter the device number MMA6910KQ.
In the Refine Your Result pane on the left, click on the Documentation link.
MMA6910KQ
2
Sensors
Freescale Semiconductor, Inc.
1
1.1
Introduction
Introduction
MMA6910KQ is a two-axis member of Freescale’s family of SPI-compatible accelerometers. These devices incorporate digital
signal processing for filtering, trim, and data formatting.
1.2
Serial communication configuration
The serial communication configuration provides a 4-wire SPI interface. Device serial number, acceleration range, filter
characteristics, and status information are available along with acceleration data via the SPI.
1.3
Block diagram
A block diagram illustrating the major components of the design is shown in
Figure 1.
V
PP
V
CC
C
REG
C
REGA
C
REGA
C
REF
C
REF
V
SS
V
SSA
VOLTAGE
REGULATOR
UNIT
PROGRAMMABLE
DATA ARRAY
REFERENCE
OSCILLATOR
PRIMARY
OSCILLATOR
CLOCK
MONITOR
INTERNAL
CLOCK
D
IN
SPI
CONTROL
LOGIC
D
OUT
SCLK
CS
CAP/HOLD
g-CELL
(Y)
ΣΔ
CONVERTER
SINC
FILTER
IN 1
CONTROL
IN
STATUS
OUT
DIGITAL
OUT
Y OUT
PCM_Y
SELF-TEST
INTERFACE
TEMP.
SENSOR
TEMP
IN 0
DSP
(SEE
FIGURE 2)
PCM
g-CELL
(X)
ΣΔ
CONVERTER
SINC
FILTER
X OUT
PCM
PCM_X
Figure 1. Block diagram
MMA6910KQ
Sensors
Freescale Semiconductor, Inc.
3
CONTROL
IN
DSP
CONTROL
STATUS
OUT
IN 1
IN 0
LOW-PASS
FILTER
OFFSET,
GAIN,
LINEARITY
ADJUST
OUTPUT
SCALING
DIGITAL
OUT
TEMP
Figure 2. DSP block diagram
1.4
Pin functions
The pinout is illustrated in
Figure 3.
Pin functions are described in the following paragraphs. When self-test is active, the output
becomes more positive in both axes, if ST1 is cleared or more negative in both axes if ST1 is set, as described in
Section 2.1.3.
X: +1g
Y: 0g
PCM_X
C
REGA
C
REGA
16 15 14 13
X: 0g
Y: +1g
X: 0g
Y: -1g
C
REF
1
C
REF
2
V
CC
3
V
SS
4
5
D
OUT
6
SCLK
7
CS/RESET
8
C
REG
V
SSA
12 PCM_Y
11 CAP/HOLD
10 D
IN
9 V
PP
TO CENTER OF
GRAVITATIONAL FIELD
X: -1g
Y: 0g
Response to static orientation within 1g field.
Figure 3. Pinout for
MMA6910KQ
TOP VIEW
16-PIN QFN PACKAGE
MMA6910KQ
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Sensors
Freescale Semiconductor, Inc.
1.4.1
V
CC
This pin supplies power to the device. Careful printed wiring board layout and capacitor placement is critical to ensure best
performance. An external bypass capacitor between this pin and V
SS
is required, as described in
Section 1.5.
1.4.2
1.4.3
V
SS
V
SSA
This pin is the power supply return node for the digital circuitry on the MMA6910KQ device.
This pin is the power supply return node for analog circuitry on the MMA6910KQ device. An external bypass capacitor between
this pin and V
CC
is required, as described in
Section 1.5.
1.4.4
C
REG
This pin is connected to the internal digital circuitry power supply rail. An external filter capacitor must be connected between this
pin and V
SS
, as described in
Section 1.5.
1.4.5
C
REGA
These pins are connected in parallel to the internal analog circuitry power supply rail. One or two external filter capacitors must
be connected between these pins and V
SSA
, as described in
Section 1.5.
Two pins are provided to support redundant connection
to the printed wiring board assembly. Redundant external capacitors may be connected to these pins for maximum reliability, as
described in
Section 1.5.
1.4.6
C
REF
These pins are connected in parallel to an internal reference voltage node utilized by the analog circuitry. One or two external
filter capacitors must be connected between these pins and V
SSA
, as described shown in
Section 1.5.
Two pins are provided to
support redundant connection to the printed wiring board assembly. Redundant external capacitors may be connected to these
pins for maximum reliability, as described in
Section 1.5.
1.4.7
V
PP
This pin should be tied directly to V
SS
. An internal pulldown device is connected to this pin to reduce the risk of unpredictable
device operation in the event that the connection to V
SS
opens.
1.4.8
SCLK
This input pin provides the serial clock to the SPI port. The state of this pin is also used as a qualifier for externally-controlled
reset. This input may be used to initiate device reset as described in
Section 1.4.9
and
Section 2.6.
An internal pulldown device
is connected to this pin.
1.4.9
CS/RESET
This pin functions as the chip select input for the SPI port. The state of the D
IN
pin, during low-to-high transitions of SCLK, is
latched internally and D
OUT
is enabled when CS is at a logic-low level.
This pin may also be used to initiate a hardware reset. If CS is held low and SCLK is held high for 512
μs,
the internal reset signal
is asserted. This behavior is described in
Section 2.6.
An internal pullup device is connected to this pin.
1.4.10
D
OUT
This pin functions as the serial data output for the SPI port. SPI data transmitted on D
OUT
will have an odd number of logic ‘1’
bits set during normal 16-bit transfer, unless an internal oscillator fault condition has been detected. If an internal oscillator fault
condition is present, D
OUT
is driven to a logic-high level continuously, when CS/RESET is asserted.
1.4.11
D
IN
This pin functions as the serial data input to the SPI port. An internal pulldown device is connected to this pin. SPI data received
at D
IN
must observe odd parity or a transient exception condition will be reported during the subsequent transfer.
MMA6910KQ
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