Crosstalk: 100dB at 50KHz, -70dB at 5MHz, -50dB at 30MHz
Off-isolation: -90dB at 50KHz, -60dB at 5MHz, -55dB at
30MHz
Single 5V supply
Bidirectional signal flow
TTL-compatible control inputs
Ultra-low quiescent current: 3μA
μ
Switch turn on time of 6.5ns
Available in QSOP package
DESCRIPTION:
APPLICATIONS:
•
•
•
•
•
•
•
•
The QS4A105 is a high-performance CMOS two-channel 4PST switch
with 3-state outputs. The low ON resistance of the QS4A105 allows inputs
to be connected to outputs with low insertion loss and high bandwidth.
The QS4A105, with 1.3GHz bandwidth, is ideal for high-performance
video signal switching, audio signal switching, and telecomm routing
applications. Low power dissipation makes this device ideal for battery
operated and remote instrumentation applications.
The QS4A105 is offered in the QSOP package which has several
advantages over conventional packages such as PDIP and SOIC, includ-
ing:
• Reduced signal delays due to denser component packaging on circuit
boards
• Reduced system noise due to less pin inductance
The QS4A105 is characterized for operation at -40°C to +85°C.
High-speed video signal switching/routing
HDTV-quality video signal routing
Audio signal switching/routing
Data acquisition
ATE systems
Telecomm routing
Token Ring transceivers
High-speed networking
FUNCTIONAL BLOCK DIAGRAM
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
E1
E2
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
CO NTR O L
LO G IC
INDUSTRIAL TEMPERATURE RANGE
c 2014 Integrated Device Technology, Inc.
APRIL 2014
1
DSC-5555/3
IDTQS4A105
HIGH-PERFORMANCE CMOS TWO-CHANNEL 4PST SWITCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
—
V
TERM
(3)
V
AC
I
OUT
P
MAX
T
STG
Description
Supply Voltage to Ground
DC Switch Voltage V
S
Analog Input Voltage
DC Input Voltage V
IN
AC Input Voltage (pulse width
≤20ns)
DC Output Current
Maximum Power Dissipation
Storage Temperature
Max
–0.5 to +7
0 to +7
0 to +7
0 to +7
–3
120
0.7
–65 to +150
Unit
V
V
V
V
V
mA
W
°C
E1
A1
D4
A2
D3
A3
D2
A4
D1
GND
1
2
3
4
5
6
7
8
9
10
QSOP
TOP VIEW
20
19
18
17
16
15
14
13
12
11
V
CC
E2
C1
B4
C2
B3
C3
B2
C4
B1
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
PIN DESCRIPTION
Pin Names
Ax, Bx
Cx, Dx
E
1
-E
2
I/O
I/O
I/O
I
Ports A, B
Ports C, D
Enable
Description
FUNCTION TABLE
(1)
E
1
H
L
H
L
E
2
H
H
L
L
Ax, Cx I/Os
Disconnected
Ax = Cx
Disconnected
Ax = Cx
Bx, Dx I/Os
Disconnected
Disconnected
Bx = Dx
Bx = Dx
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
2
IDTQS4A105
HIGH-PERFORMANCE CMOS TWO-CHANNEL 4PST SWITCH
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5V ± 5%
Symbol
Analog Switch
V
IN
r
DS
(
ON
)
I
C(OFF)
I
C(ON)
Analog Signal Range
(2)
Drain-source ON resistance
(2,3)
Channel Off Leakage Current
Channel On Leakage Current
Vcc = Min., V
IN
= 0V, I
ON
= 30mA
Vcc = Min., V
IN
= 2.4V, I
ON
= 15mA
Ax, Bx = Vcc or 0V, Cx, Dx = 0V or Vcc,
E
= Vcc
Ax = Bx = Cx = Dx = 0V
(each channel is turned on sequentially)
Digital Control
V
IH
V
IL
t
ON(E)
t
OFF(E)
t
PD
f
3dB
X
TALK
C
(OFF)
C
(ON)
Q
CI
Input HIGH Voltage
Input LOW Voltage
Enable Turn-On Time
E
to Ax, Bx, Cx, or Dx
Enable Turn-Off Time
E
to Ax, Bx, Cx, or Dx
Group Delay
(2,4a)
-3dB Bandwidth
Off-isolation
Crosstalk
Mux Off Capacitance
Mux On Capacitance
Charge Injection
Guaranteed Logic HIGH for Control Pins
Guaranteed Logic LOW for Control Pins
R
L
= 1KΩ, C
L
= 100pF
(See Switching Time)
R
L
= 1KΩ, C
L
= 100pF
(See Switching Time)
R
L
= 1KΩ, C
L
= 100pF
V
IN
= 0 to 1V, 1Vp-p, R
L
= 75Ω
V
IN
= 0 to 1V, 1Vp-p, R
L
= 75Ω, f = 5.5MHz
V
IN
= 1Vp-p, R
L
= 75Ω, f = 5.5MHz
E
= Vcc, V
IN
= V
OUT
= 0V
E
= 0V, V
IN
= V
OUT
= 0V
C
L
= 1000pF
—
—
—
—
—
—
—
—
1.3
-60
-70
5
10
1.5
250
—
—
—
—
—
—
ps
GHz
dB
dB
pF
pF
pC
0.5
—
6
ns
2
—
0.5
—
—
—
—
0.8
6.5
V
V
ns
0
—
—
—
—
—
5
13
1
1
Vcc - 1
7
17
—
—
nA
nA
V
Ω
Parameter
Test Conditions
Min.
Typ.
(1)
Max.
Unit
Dynamic Characteristics
NOTES:
1. Typical values are at V
CC
= 5.0V, T
A
= 25°C.
2. Max value is guaranteed but not production tested.
3. Measured by voltage drop between A and C pins or B and D pins at indicated current through the switch. ON resistance is determined by the lower of the voltages on the
two (A, C, or B, D) pins.
4. The bus switch contributes no group delay other than the RC delay of the ON resistance of the switch and load capacitance. Group delay of the bus switch, when used
in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
